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* target-i386: Fix CC_OP_CLR vs PFRichard Henderson2014-02-281-1/+1
| | | | | | | | | Parity should be set for a zero result. Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386/helper: remove DF macroliguang2013-06-151-1/+1
| | | | | | | Signed-off-by: liguang <lig.fnst@cn.fujitsu.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-i386: Add CC_OP_CLRRichard Henderson2013-02-191-0/+3
| | | | | | | Special case xor with self. We need not even store the known zero into cc_src. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Implement ADX extensionRichard Henderson2013-02-191-0/+30
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Implement BLSR, BLSMSK, BLSIRichard Henderson2013-02-181-0/+18
| | | | | | Do all of group 17 at one time for ease. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Use CC_SRC2 for ADC and SBBRichard Henderson2013-02-181-19/+21
| | | | | | | | Add another slot in ENV and store two of the three inputs. This lets us do less work when carry-out is not needed, and avoids the unpredictable CC_OP after translating these insns. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Make helper_cc_compute_{all,c} constRichard Henderson2013-02-181-8/+4
| | | | | | | Pass the data in explicitly, rather than indirectly via env. This avoids all sorts of unnecessary register spillage. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-i386: Don't reference ENV through most of cc helpersRichard Henderson2013-02-181-131/+86
| | | | | | | | | In preparation for making this a const helper. By using the proper types in the parameters to the helper functions, we get to avoid quite a lot of subsequent casting. Signed-off-by: Richard Henderson <rth@twiddle.net>
* x86: Implement SMEP and SMAPH. Peter Anvin2012-10-011-0/+10
| | | | | | | | | | | | | | | | | | | | | | This patch implements Supervisor Mode Execution Prevention (SMEP) and Supervisor Mode Access Prevention (SMAP) for x86. The purpose of the patch, obviously, is to help kernel developers debug the support for those features. A fair bit of the code relates to the handling of CPUID features. The CPUID code probably would get greatly simplified if all the feature bit words were unified into a single vector object, but in the interest of producing a minimal patch for SMEP/SMAP, and because I had very limited time for this project, I followed the existing style. [ v2: don't change the definition of the qemu64 CPU shorthand, since that breaks loading old snapshots. Per Anthony Liguori this can be fixed once the CPU feature set is snapshot. Change the coding style slightly to conform to checkpatch.pl. ] Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* x86: avoid AREG0 for condition code helpersBlue Swirl2012-08-141-103/+96
| | | | | | Add an explicit CPUX86State parameter instead of relying on AREG0. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: split off condition code helpersBlue Swirl2012-06-281-0/+387
Move condition code helpers to cc_helper.c. Move the shared inline functions lshift(), cpu_load_eflags() and cpu_cc_compute_all() to cpu.h. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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