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* Switch non-CPU callers from ld/st*_phys to address_space_ld/st*Peter Maydell2015-04-261-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch all the uses of ld/st*_phys to address_space_ld/st*, except for those cases where the address space is the CPU's (ie cs->as). This was done with the following script which generates a Coccinelle patch. A few over-80-columns lines in the result were rewrapped by hand where Coccinelle failed to do the wrapping automatically, as well as one location where it didn't put a line-continuation '\' when wrapping lines on a change made to a match inside a macro definition. ===begin=== #!/bin/sh -e # Usage: # ./ldst-phys.spatch.sh > ldst-phys.spatch # spatch -sp_file ldst-phys.spatch -dir . | sed -e '/^+/s/\t/ /g' > out.patch # patch -p1 < out.patch for FN in ub uw_le uw_be l_le l_be q_le q_be uw l q; do cat <<EOF @ cpu_matches_ld_${FN} @ expression E1,E2; identifier as; @@ ld${FN}_phys(E1->as,E2) @ other_matches_ld_${FN} depends on !cpu_matches_ld_${FN} @ expression E1,E2; @@ -ld${FN}_phys(E1,E2) +address_space_ld${FN}(E1,E2, MEMTXATTRS_UNSPECIFIED, NULL) EOF done for FN in b w_le w_be l_le l_be q_le q_be w l q; do cat <<EOF @ cpu_matches_st_${FN} @ expression E1,E2,E3; identifier as; @@ st${FN}_phys(E1->as,E2,E3) @ other_matches_st_${FN} depends on !cpu_matches_st_${FN} @ expression E1,E2,E3; @@ -st${FN}_phys(E1,E2,E3) +address_space_st${FN}(E1,E2,E3, MEMTXATTRS_UNSPECIFIED, NULL) EOF done ===endit=== Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
* exec: Make ldq/ldub_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-5/+5
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-17/+19
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* target-i386: Fix compiler warning (integer constant is too large)Stefan Weil2013-10-021-1/+1
| | | | | | | | | | | | From buildbot default_i386_rhel61: CC i386-softmmu/target-i386/arch_memory_mapping.o target-i386/arch_memory_mapping.c: In function 'walk_pde': target-i386/arch_memory_mapping.c:110: warning: integer constant is too large for 'long' type Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* cpu: Turn cpu_get_memory_mapping() into a CPUState hookAndreas Färber2013-06-111-5/+7
| | | | | | | | | Change error reporting from return value to Error argument. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com> [AF: Fixed cpu_get_memory_mapping() documentation] Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Turn cpu_paging_enabled() into a CPUState hookAndreas Färber2013-06-111-5/+1
| | | | | | | | Relocate assignment of x86 get_arch_id to have all hooks in one place. Reviewed-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Fix mask of pte index in memory mappingQiao Nuohan2013-05-311-1/+1
| | | | | | | | | | | Function walk_pte() needs pte index to calculate virtual address. However, pte index of PAE paging or IA-32e paging is 9 bit, so the mask should be 0x1ff. Signed-off-by: Qiao Nuohan <qiaonuohan@cn.fujitsu.com> Reviewed-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
* target-i386: fix abort on bad PML4E/PDPTE/PDE/PTE addressesLuiz Capitulino2013-05-311-4/+6
| | | | | | | | | | | | | | | | The code used to walk IA-32e page-tables, and possibly PAE page-tables, uses the bit mask ~0xfff to get the next PML4E/PDPTE/PDE/PTE address. However, as we use a uint64_t to store the resulting address, that mask gets expanded to 0xfffffffffffff000 which not only ends up selecting reserved bits but also selects the XD bit (execute-disable) which happens to be enabled by Windows 8, causing qemu_get_ram_ptr() to abort. This commit fixes that problem by replacing ~0xfff by a correct mask that only selects the address bit range (ie. bits 51:12). Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
* target-i386: fix bits 39:32 of the final physical address when using 4M pageWen Congyang2013-01-091-3/+8
| | | | | | | | | | ((pde & 0x1fe000) << 19) is the bits 39:32 of the final physical address, and we shouldn't use unit32_t to calculate it. Convert the type to hwaddr to fix this problem. Signed-off-by: Wen Congyang <wency@cn.fujitsu.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
* softmmu: move include files to include/sysemu/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-17/+17
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Fix some more license versions (GPL2+ instead of GPL2)Stefan Weil2012-06-111-2/+2
| | | | | Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Wen Congyang <wency@cn.fujitsu.com>
* dump: remove dumping stuff from cpu-all.hPaolo Bonzini2012-06-071-0/+1
| | | | | | | | This simplifies things, because they will only be included for softmmu targets and because the stubs are taken out-of-line in separate files, which in the future could even be compiled only once. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Add API to check whether paging mode is enabledWen Congyang2012-06-041-1/+6
| | | | | | | This API will be used in the following patch. Signed-off-by: Wen Congyang <wency@cn.fujitsu.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
* implement cpu_get_memory_mapping()Wen Congyang2012-06-041-0/+266
Walk cpu's page table and collect all virtual address and physical address mapping. Then, add these mapping into memory mapping list. If the guest does not use paging, it will do nothing. Note: the I/O memory will be skipped. Signed-off-by: Wen Congyang <wency@cn.fujitsu.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
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