hqemu - HQEMU

	Commit message (Expand)	Author	Age	Files	Lines
*	target-*: Unconditionally emit tcg_gen_insn_start	Richard Henderson	2015-10-07	1	-3/+0
*	tcg: Rename debug_insn_start to insn_start	Richard Henderson	2015-10-07	1	-1/+1
*	tlb: Add "ifetch" argument to cpu_mmu_index()	Benjamin Herrenschmidt	2015-09-11	1	-1/+1
*	target-cris: Use movcond and setcond	Richard Henderson	2015-09-08	1	-10/+2
*	tcg: Change translator-side labels to a pointer	Richard Henderson	2015-03-13	1	-4/+2
*	target-cris/translate.c: Remove t_gen_mov_TN_reg and t_gen_mov_reg_TN	Peter Maydell	2014-06-09	1	-1/+1
*	target-cris: Replace DisasContext::env field with CRISCPU	Andreas Färber	2014-03-13	1	-8/+8
*	exec: Change cpu_abort() argument to CPUState	Andreas Färber	2014-03-13	1	-6/+6
*	target-cris: Move TCG initialization to CRISCPU initfn	Andreas Färber	2013-02-16	1	-4/+1
*	target-cris: Switch to AREG0 free mode	Aurelien Jarno	2012-09-15	1	-46/+49
*	target-cris: Avoid AREG0 for helpers	Aurelien Jarno	2012-09-15	1	-2/+2
*	cris: Add break support for v10.	Edgar E. Iglesias	2012-06-14	1	-0/+1
*	target-cris: Don't overuse CPUState	Andreas Färber	2012-03-14	1	-13/+13
*	cris: Handle conditional stores on CRISv10	Stefan Sandstrom	2011-12-12	1	-6/+66
*	cris: Handle opcode zero	Edgar E. Iglesias	2011-06-28	1	-3/+0
*	Fix typo in comment (truely -> truly)	Stefan Weil	2011-05-08	1	-1/+1
*	cris: Allow more TB chaining for crisv10	Edgar E. Iglesias	2011-01-10	1	-4/+6
*	cris: avoid a write only variable	Blue Swirl	2010-10-13	1	-3/+2
*	Replace assert(0) with abort() or cpu_abort()	Blue Swirl	2010-03-18	1	-7/+9
*	Update to a hopefully more future proof FSF address	Blue Swirl	2010-03-07	1	-2/+1
*	cris: Mask interrupts on dslots for CRISv10.	Edgar E. Iglesias	2010-02-20	1	-0/+4
*	crisv10: Prettify.	Edgar E. Iglesias	2010-02-15	1	-95/+91
*	cris: Add support for CRISv10 translation.	Edgar E. Iglesias	2010-02-15	1	-0/+1243