| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | target-cris: update CPU state save/load to use VMStateDescription | Juan Quintela | 2015-09-17 | 1 | -83/+84 |
| * | Convert machine registration to use module init functions | Anthony Liguori | 2009-05-21 | 1 | -6/+0 |
| * | CRIS: Avoid endless loops for unstested CRIS cpu-state load/save. | edgar_igl | 2009-03-03 | 1 | -4/+4 |
| * | ETRAX: Add a model for the axis devboard88 machine. | edgar_igl | 2009-01-07 | 1 | -0/+1 |
| * | CRIS: Add (untested) cpu-state save/load. | edgar_igl | 2008-06-09 | 1 | -0/+88 |
| * | remove target ifdefs from vl.c | aurel32 | 2008-05-04 | 1 | -0/+7 |
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| HQEMU | Raptor Engineering, LLC |
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