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target-arm
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Age
Files
Lines
...
*
target-arm: Correct sense of the DCZID DZP bit
Peter Maydell
2014-10-24
2
-3
/
+3
*
target-arm: add emulation of PSCI calls for system emulation
Rob Herring
2014-10-24
9
-3
/
+301
*
target-arm: Add support for A32 and T32 HVC and SMC insns
Peter Maydell
2014-10-24
3
-11
/
+104
*
target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpers
Peter Maydell
2014-10-24
2
-9
/
+12
*
target-arm: add missing PSCI constants needed for PSCI emulation
Ard Biesheuvel
2014-10-24
1
-0
/
+40
*
target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes
Rob Herring
2014-10-24
4
-6
/
+6
*
target-arm: add powered off cpu state
Rob Herring
2014-10-24
3
-3
/
+12
*
gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag
Peter Maydell
2014-10-06
1
-0
/
+1
*
target-arm: Add support for VIRQ and VFIQ
Edgar E. Iglesias
2014-09-29
5
-14
/
+76
*
target-arm: Add IRQ and FIQ routing to EL2 and 3
Edgar E. Iglesias
2014-09-29
2
-0
/
+27
*
target-arm: A64: Emulate the SMC insn
Edgar E. Iglesias
2014-09-29
7
-0
/
+51
*
target-arm: Add a Hypervisor Trap exception type
Edgar E. Iglesias
2014-09-29
4
-0
/
+4
*
target-arm: A64: Emulate the HVC insn
Edgar E. Iglesias
2014-09-29
7
-10
/
+81
*
target-arm: A64: Correct updates to FAR and ESR on exceptions
Edgar E. Iglesias
2014-09-29
1
-4
/
+3
*
target-arm: Don't take interrupts targeting lower ELs
Edgar E. Iglesias
2014-09-29
1
-0
/
+7
*
target-arm: Break out exception masking to a separate func
Edgar E. Iglesias
2014-09-29
2
-5
/
+17
*
target-arm: A64: Refactor aarch64_cpu_do_interrupt
Edgar E. Iglesias
2014-09-29
3
-11
/
+33
*
target-arm: Add SCR_EL3
Edgar E. Iglesias
2014-09-29
2
-3
/
+51
*
target-arm: Add HCR_EL2
Edgar E. Iglesias
2014-09-29
2
-0
/
+70
*
target-arm: Don't handle c15_cpar changes via tb_flush()
Peter Maydell
2014-09-29
6
-30
/
+44
*
target-arm: Implement handling of breakpoint firing
Peter Maydell
2014-09-29
2
-15
/
+66
*
target-arm: Implement setting guest breakpoints
Peter Maydell
2014-09-29
5
-2
/
+136
*
target-arm: Use cpu_exec_interrupt qom hook
Richard Henderson
2014-09-25
3
-0
/
+36
*
target-arm: Make *IS TLB maintenance ops affect all CPUs
Peter Maydell
2014-09-12
1
-12
/
+89
*
target-arm: Push legacy wildcard TLB ops back into v6
Peter Maydell
2014-09-12
1
-47
/
+55
*
target-arm: Implement minimal DBGVCR, OSDLR_EL1, MDCCSR_EL0
Peter Maydell
2014-09-12
1
-0
/
+19
*
target-arm: Remove comment about MDSCR_EL1 being dummy implementation
Peter Maydell
2014-09-12
1
-3
/
+1
*
target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32
Peter Maydell
2014-09-12
1
-0
/
+26
*
target-arm: Implement handling of fired watchpoints
Peter Maydell
2014-09-12
4
-1
/
+204
*
target-arm: Move extended_addresses_enabled() to internals.h
Peter Maydell
2014-09-12
2
-11
/
+11
*
target-arm: Implement setting of watchpoints
Peter Maydell
2014-09-12
5
-3
/
+149
*
target-arm: Fix broken indentation in arm_cpu_reest()
Martin Galvan
2014-09-12
1
-1
/
+1
*
target-arm: Fix resetting issues on ARMv7-M CPUs
Martin Galvan
2014-09-12
1
-10
/
+22
*
target-arm: Implement pmccfiltr_write function
Alistair Francis
2014-08-29
1
-0
/
+9
*
target-arm: Remove old code and replace with new functions
Alistair Francis
2014-08-29
1
-23
/
+4
*
target-arm: Implement pmccntr_sync function
Alistair Francis
2014-08-29
2
-0
/
+34
*
target-arm: Add arm_ccnt_enabled function
Alistair Francis
2014-08-29
1
-0
/
+12
*
target-arm: Implement PMCCNTR_EL0 and related registers
Alistair Francis
2014-08-29
2
-8
/
+42
*
arm: Implement PMCCNTR 32b read-modify-write
Peter Crosthwaite
2014-08-29
1
-1
/
+10
*
target-arm: Make the ARM PMCCNTR register 64-bit
Alistair Francis
2014-08-29
2
-11
/
+10
*
target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
Peter Maydell
2014-08-29
1
-1
/
+2
*
target-arm: Fix regression that disabled VFP for ARMv5 CPUs
Peter Maydell
2014-08-29
1
-1
/
+8
*
arm: cortex-a9: Fix cache-line size and associativity
Peter Crosthwaite
2014-08-19
1
-2
/
+2
*
arm/virt: Use PSCI v0.2 function IDs in the DT when KVM uses PSCI v0.2
Christoffer Dall
2014-08-19
1
-0
/
+27
*
target-arm: Rename QEMU PSCI v0.1 definitions
Christoffer Dall
2014-08-19
1
-11
/
+11
*
target-arm: Implement MDSCR_EL1 as having state
Peter Maydell
2014-08-19
1
-1
/
+3
*
target-arm: Implement ARMv8 single-stepping for AArch32 code
Peter Maydell
2014-08-19
2
-2
/
+95
*
target-arm: Implement ARMv8 single-step handling for A64 code
Peter Maydell
2014-08-19
6
-5
/
+131
*
target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tb
Peter Maydell
2014-08-19
1
-2
/
+3
*
target-arm: Set PSTATE.SS correctly on exception return from AArch64
Peter Maydell
2014-08-19
2
-0
/
+81
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