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* target-arm: A64: Add SIMD three-different ABDL instructionsPeter Maydell2014-01-311-2/+33
* target-arm: A64: Add SIMD three-different multiply accumulate insnsPeter Maydell2014-01-311-1/+232
* target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTMWill Newton2014-01-311-1/+52
* target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTMWill Newton2014-01-311-0/+61
* target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZWill Newton2014-01-311-1/+39
* target-arm: Add set_neon_rmode helperWill Newton2014-01-312-0/+18
* target-arm: Add support for AArch32 SIMD VRINTXWill Newton2014-01-311-1/+10
* target-arm: Add support for AArch32 FP VRINTXWill Newton2014-01-311-0/+11
* target-arm: Add support for AArch32 FP VRINTZWill Newton2014-01-311-0/+16
* target-arm: Add support for AArch32 FP VRINTRWill Newton2014-01-311-0/+11
* target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTMWill Newton2014-01-311-0/+54
* target-arm: Move arm_rmode_to_sf to a shared location.Will Newton2014-01-313-28/+30
* ARM: Convert MIDR to a propertyAlistair Francis2014-01-311-0/+1
* target-arm: A64: Add SIMD scalar copy instructionsPeter Maydell2014-01-311-1/+42
* target-arm: A64: Add SIMD modified immediate groupAlex Bennée2014-01-311-1/+119
* target-arm: A64: Add SIMD copy operationsAlex Bennée2014-01-311-1/+209
* target-arm: A64: Add SIMD across-lanes instructionsMichael Matz2014-01-311-1/+176
* target-arm: A64: Add SIMD ZIP/UZP/TRNMichael Matz2014-01-311-1/+75
* target-arm: A64: Add SIMD TBL/TBLXMichael Matz2014-01-313-1/+86
* target-arm: A64: Add SIMD EXTPeter Maydell2014-01-311-1/+78
* target-arm: A64: Add decode skeleton for SIMD data processing insnsAlex Bennée2014-01-311-1/+305
* target-arm: A64: Add SIMD ld/st singlePeter Maydell2014-01-311-2/+142
* target-arm: A64: Add SIMD ld/st multipleAlex Bennée2014-01-311-2/+248
* Merge remote branch 'luiz/queue/qmp' into qmpqEdgar E. Iglesias2014-01-141-5/+2
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| * hw: Remove assert_no_error usagesPeter Crosthwaite2014-01-061-5/+2
* | target-arm: Switch ARMCPUInfo arrays to use terminator entriesPeter Maydell2014-01-142-12/+12
* | arm: fix compile on bigendian hostAlexey Kardashevskiy2014-01-121-1/+1
* | target-arm: A64: Add support for FCVT between half, single and doublePeter Maydell2014-01-083-1/+96
* | target-arm: A64: Add 1-source 32-to-32 and 64-to-64 FP instructionsPeter Maydell2014-01-083-1/+191
* | target-arm: A64: Add floating-point<->integer conversion instructionsWill Newton2014-01-081-3/+20
* | target-arm: A64: Add floating-point<->fixed-point instructionsAlexander Graf2014-01-083-1/+200
* | target-arm: A64: Add extra VFP fixed point conversion helpersWill Newton2014-01-082-1/+26
* | target-arm: Ignore most exceptions from scalbn when doing fixpoint conversionPeter Maydell2014-01-081-0/+9
* | target-arm: Rename A32 VFP conversion helpersWill Newton2014-01-083-24/+35
* | target-arm: Prepare VFP_CONV_FIX helpers for A64 usesWill Newton2014-01-081-14/+14
* | target-arm: fix build with gcc 4.8.2Michael S. Tsirkin2014-01-081-0/+6
* | target-arm: remove raw_read|write duplicationPeter Crosthwaite2014-01-081-10/+2
* | target-arm: use c13_context field for CONTEXTIDRSergey Fedorov2014-01-081-1/+1
* | target-arm: Give the FPSCR rounding modes namesAlexander Graf2014-01-082-4/+13
* | target-arm: A64: Add support for floating point cond selectClaudio Fontana2014-01-081-1/+44
* | target-arm: A64: Add support for floating point conditional compareClaudio Fontana2014-01-081-1/+34
* | target-arm: A64: Add support for floating point compareClaudio Fontana2014-01-083-1/+113
* | target-arm: A64: Add fmov (scalar, immediate) instructionAlexander Graf2014-01-081-1/+31
* | target-arm: A64: Add "Floating-point data-processing (3 source)" insnsAlexander Graf2014-01-081-1/+94
* | target-arm: A64: Add "Floating-point data-processing (2 source)" insnsAlexander Graf2014-01-081-1/+181
* | target-arm: Use VFP_BINOP macro for min, max, minnum, maxnumPeter Maydell2014-01-084-52/+20
* | target-arm: A64: Fix vector register access on bigendian hostsPeter Maydell2014-01-081-34/+35
* | target-arm: A64: Add support for dumping AArch64 VFP register stateAlexander Graf2014-01-081-0/+16
* | target-arm: A64: support for ld/st/cl exclusiveMichael Matz2014-01-081-3/+153
* | target-arm: Widen exclusive-access support struct fields to 64 bitsPeter Maydell2014-01-083-36/+49
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