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* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-053-4/+3
* target-arm: move arm_*_code to a separate filePaolo Bonzini2014-06-055-22/+50
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-289-16/+10
* target-arm: A64: Register VBAR_EL3Edgar E. Iglesias2014-05-272-1/+6
* target-arm: A64: Register VBAR_EL2Edgar E. Iglesias2014-05-272-1/+22
* target-arm: Make vbar_write writeback to any CPREGEdgar E. Iglesias2014-05-271-1/+1
* target-arm: A64: Generalize update_spsel for the various ELsEdgar E. Iglesias2014-05-271-5/+6
* target-arm: A64: Generalize ERET to various ELsEdgar E. Iglesias2014-05-271-5/+6
* target-arm: A64: Trap ERET from EL0 at translation timeEdgar E. Iglesias2014-05-271-0/+4
* target-arm: A64: Forbid ERET to higher or unimplemented ELsEdgar E. Iglesias2014-05-271-2/+6
* target-arm: Register EL3 versions of ELR and SPSREdgar E. Iglesias2014-05-271-0/+16
* target-arm: Register EL2 versions of ELR and SPSREdgar E. Iglesias2014-05-271-0/+16
* target-arm: Add a feature flag for EL3Edgar E. Iglesias2014-05-271-0/+1
* target-arm: Add a feature flag for EL2Edgar E. Iglesias2014-05-271-0/+1
* target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias2014-05-273-2/+17
* target-arm: Add SPSR entries for EL2/HYP and EL3/MONEdgar E. Iglesias2014-05-274-6/+12
* target-arm: A64: Add ELR entries for EL2 and 3Edgar E. Iglesias2014-05-272-4/+4
* target-arm: A64: Add SP entries for EL2 and 3Edgar E. Iglesias2014-05-272-4/+4
* target-arm: c12_vbar -> vbar_el[]Edgar E. Iglesias2014-05-273-5/+5
* target-arm: Make esr_el1 an arrayEdgar E. Iglesias2014-05-273-8/+8
* target-arm: Make elr_el1 an arrayEdgar E. Iglesias2014-05-276-10/+11
* target-arm: Use a 1:1 mapping between EL and MMU indexEdgar E. Iglesias2014-05-272-9/+5
* target-arm: A32: Use get_mem_index for load/storesEdgar E. Iglesias2014-05-271-106/+106
* target-arm/translate.c: Use get_mem_index() for SRS memory accessesPeter Maydell2014-05-271-2/+2
* target-arm/translate.c: Clean up mmu index handling for ldrt/strtPeter Maydell2014-05-271-12/+17
* target-arm: Move get_mem_index to translate.hEdgar E. Iglesias2014-05-272-9/+9
* target-arm: implement CPACR register logic for ARMv7Fabian Aggeler2014-05-271-4/+28
* target-arm: Fix segfault on startup when KVM enabledChristoffer Dall2014-05-271-1/+1
* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140513'...Peter Maydell2014-05-152-5/+7
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| * target-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchangedPeter Maydell2014-05-131-0/+7
| * savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela2014-05-131-5/+0
* | kvm: reset state from the CPU's reset methodPaolo Bonzini2014-05-134-4/+17
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* vmstate: s/VMSTATE_INT32_LE/VMSTATE_INT32_POSITIVE_LE/Michael S. Tsirkin2014-05-051-1/+1
* target-arm: Correct a comment refering to EL0Edgar E. Iglesias2014-05-011-1/+1
* target-arm: A64: Fix a typo when declaring TLBI opsEdgar E. Iglesias2014-05-011-12/+12
* target-arm: A64: Handle blr lrEdgar E. Iglesias2014-05-011-1/+2
* target-arm: Make vbar_write 64bit friendly on 32bit hostsEdgar E. Iglesias2014-05-011-1/+1
* target-arm: implement WFE/YIELD as a yield for AArch64Rob Herring2014-05-011-0/+6
* target-arm: Implement XScale cache lockdown operations as NOPsPeter Maydell2014-05-011-0/+15
* target-arm: A64: fix unallocated test of scalar SQXTUNAlex Bennée2014-04-171-1/+1
* arm: translate.c: Fix smlald InstructionPeter Crosthwaite2014-04-171-11/+23
* target-arm/gdbstub64.c: remove useless 'break' statement.Chen Gang2014-04-171-2/+0
* target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell2014-04-174-3/+13
* target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pcPeter Maydell2014-04-171-4/+8
* target-arm: Make Cortex-A15 CBAR read-onlyPeter Maydell2014-04-171-1/+1
* target-arm: Implement CBAR for Cortex-A57Peter Maydell2014-04-175-9/+42
* target-arm: Implement Cortex-A57 implementation-defined system registersPeter Maydell2014-04-171-0/+55
* target-arm: Implement RVBAR registerPeter Maydell2014-04-173-0/+16
* target-arm: Implement AArch64 address translation operationsPeter Maydell2014-04-172-31/+25
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