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target-arm
Commit message (
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Author
Age
Files
Lines
*
target-arm: Refactor CPU affinity handling
Pavel Fedin
2015-09-07
4
-5
/
+16
*
target-arm: Fix arm_excp_unmasked() function
Sergey Sorokin
2015-09-07
1
-3
/
+3
*
target-arm: Fix AArch32:AArch64 general-purpose register mapping
Sergey Sorokin
2015-09-07
1
-32
/
+32
*
arm: Remove hw_error() usages.
Peter Crosthwaite
2015-09-07
2
-3
/
+3
*
arm: cpu: assert() on no-EL2 virt IRQ error condition.
Peter Crosthwaite
2015-09-07
1
-4
/
+1
*
target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
Peter Maydell
2015-09-07
4
-2
/
+31
*
target-arm/arm-semi.c: SYS_EXIT on A64 takes a parameter block
Peter Maydell
2015-09-07
1
-3
/
+18
*
target-arm/arm-semi.c: Implement A64 specific SyncCacheRange call
Peter Maydell
2015-09-07
1
-0
/
+10
*
target-arm/arm-semi.c: Support widening APIs to 64 bits
Peter Maydell
2015-09-07
2
-13
/
+58
*
target-arm/arm-semi.c: Factor out repeated 'return env->regs[0]'
Peter Maydell
2015-09-07
1
-32
/
+47
*
target-arm: Improve semihosting debug prints
Christopher Covington
2015-09-07
1
-3
/
+9
*
target-arm/arm-semi.c: Fix broken SYS_WRITE0 via gdb
Peter Maydell
2015-09-07
1
-1
/
+1
*
target-arm: Implement AArch64 TLBI operations on IPAs
Peter Maydell
2015-08-25
1
-0
/
+55
*
target-arm: Implement missing EL3 TLB invalidate operations
Peter Maydell
2015-08-25
1
-0
/
+76
*
target-arm: Implement missing EL2 TLBI operations
Peter Maydell
2015-08-25
1
-0
/
+22
*
target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touch
Peter Maydell
2015-08-25
1
-43
/
+129
*
target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric order
Peter Maydell
2015-08-25
1
-8
/
+8
*
target-arm: Implement AArch32 ATS1H* operations
Peter Maydell
2015-08-25
1
-0
/
+22
*
target-arm: Enable the AArch32 ATS12NSO ops
Peter Maydell
2015-08-25
1
-5
/
+11
*
target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3
Peter Maydell
2015-08-25
2
-0
/
+11
*
target-arm: Wire up AArch64 EL2 and EL3 address translation ops
Peter Maydell
2015-08-25
1
-2
/
+41
*
target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translations
Peter Maydell
2015-08-25
1
-0
/
+5
*
target-arm: Implement missing ACTLR registers
Peter Maydell
2015-08-25
1
-6
/
+15
*
target-arm: Implement missing AFSR registers
Peter Maydell
2015-08-25
1
-0
/
+24
*
target-arm: Implement missing AMAIR registers
Peter Maydell
2015-08-25
1
-0
/
+21
*
target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registers
Peter Maydell
2015-08-25
1
-0
/
+8
*
tcg: Remove tcg_gen_trunc_i64_i32
Richard Henderson
2015-08-24
2
-53
/
+53
*
target-arm: Add AArch32 banked register access to secure physical timer
Peter Maydell
2015-08-13
1
-0
/
+27
*
target-arm: Add the AArch64 view of the Secure physical timer
Peter Maydell
2015-08-13
4
-1
/
+92
*
target-arm: Add debug check for mismatched cpreg resets
Peter Maydell
2015-08-13
3
-1
/
+27
*
Introduce gic_class_name() instead of repeating condition
Pavel Fedin
2015-08-13
1
-0
/
+5
*
target-arm: Add the Hypervisor timer
Edgar E. Iglesias
2015-08-13
4
-1
/
+73
*
target-arm: Pass timeridx as argument to various timer functions
Edgar E. Iglesias
2015-08-13
1
-22
/
+77
*
target-arm: Rename and move gt_cnt_reset
Edgar E. Iglesias
2015-08-13
1
-7
/
+5
*
target-arm: Add CNTHCTL_EL2
Edgar E. Iglesias
2015-08-13
2
-2
/
+32
*
target-arm: Add CNTVOFF_EL2
Edgar E. Iglesias
2015-08-13
2
-6
/
+42
*
target-arm: kvm: Differentiate registers based on write-back levels
Christoffer Dall
2015-07-21
6
-6
/
+76
*
target-arm: Fix broken SCTLR_EL3 reset
Peter Maydell
2015-07-15
1
-0
/
+1
*
disas: arm: QOMify target specific disas setup
Peter Crosthwaite
2015-07-09
1
-0
/
+35
*
cpu-exec: Purge all uses of ENV_GET_CPU()
Peter Crosthwaite
2015-07-09
1
-1
/
+1
*
cpu: Change cpu_exec_init() arg to cpu, not env
Peter Crosthwaite
2015-07-09
1
-1
/
+1
*
cpu: Add Error argument to cpu_exec_init()
Bharata B Rao
2015-07-09
1
-1
/
+1
*
crypto: move built-in AES implementation into crypto/
Daniel P. Berrange
2015-07-07
1
-1
/
+1
*
target-arm: Implement YIELD insn to yield in ARM and Thumb translators
Peter Maydell
2015-07-06
1
-0
/
+7
*
target-arm: Split DISAS_YIELD from DISAS_WFE
Peter Maydell
2015-07-06
4
-3
/
+23
*
target-arm: fix write helper for TLBI ALLE1IS
Sergey Fedorov
2015-07-06
1
-1
/
+1
*
target-arm: A64: Print ELR when taking exceptions
Soren Brinkmann
2015-06-26
1
-0
/
+2
*
target-arm: default empty semihosting cmdline
Liviu Ionescu
2015-06-26
1
-2
/
+9
*
Include qapi/qmp/qerror.h exactly where needed
Markus Armbruster
2015-06-22
1
-1
/
+0
*
disas: Remove uses of CPU env
Peter Crosthwaite
2015-06-22
2
-2
/
+2
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