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* target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton2014-02-265-0/+100
* target-arm: Add utility function for checking AA32/64 state of an ELPeter Maydell2014-02-261-0/+16
* target-arm: Implement AArch64 view of CPACRPeter Maydell2014-02-262-2/+3
* target-arm: A64: Implement MSR (immediate) instructionsPeter Maydell2014-02-263-1/+51
* target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell2014-02-263-19/+30
* target-arm: A64: Implement WFIPeter Maydell2014-02-261-1/+4
* target-arm: Get MMU index information correct for A64 codePeter Maydell2014-02-262-4/+9
* target-arm: Implement AArch64 OSLAR_EL1 sysreg as WIPeter Maydell2014-02-261-0/+4
* target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell2014-02-262-0/+36
* target-arm: Implement AArch64 ID and feature registersPeter Maydell2014-02-262-0/+55
* target-arm: Implement AArch64 generic timersPeter Maydell2014-02-262-14/+75
* target-arm: Implement AArch64 MPIDRPeter Maydell2014-02-261-2/+4
* target-arm: Implement AArch64 TTBR*Peter Maydell2014-02-262-63/+32
* target-arm: Implement AArch64 VBAR_EL1Peter Maydell2014-02-262-2/+9
* target-arm: Implement AArch64 TCR_EL1Peter Maydell2014-02-262-4/+17
* target-arm: Implement AArch64 SCTLR_EL1Peter Maydell2014-02-262-2/+3
* target-arm: Implement AArch64 memory attribute registersPeter Maydell2014-02-262-1/+26
* target-arm: Implement AArch64 dummy MDSCR_EL1Peter Maydell2014-02-261-0/+6
* target-arm: Implement AArch64 TLB invalidate opsPeter Maydell2014-02-261-0/+73
* target-arm: Implement AArch64 cache invalidate/clean opsPeter Maydell2014-02-262-2/+49
* target-arm: Implement AArch64 MIDR_EL1Peter Maydell2014-02-261-0/+3
* target-arm: Implement AArch64 CurrentEL sysregPeter Maydell2014-02-263-1/+12
* target-arm: A64: Make cache ID registers visible to AArch64Peter Maydell2014-02-264-11/+25
* target-arm: Fix raw read and write functions on AArch64 registersPeter Maydell2014-02-263-3/+15
* arm: vgic device control api supportChristoffer Dall2014-02-262-13/+59
* target-arm: Load correct access bits from ARMv5 level 2 page table descriptorsPeter Maydell2014-02-261-1/+1
* target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS opsPeter Maydell2014-02-261-2/+2
* target-arm: A64: Implement unprivileged load/storePeter Maydell2014-02-201-32/+37
* target-arm: A64: Implement narrowing three-reg-diff operationsPeter Maydell2014-02-201-1/+59
* target-arm: A64: Implement the wide 3-reg-different operationsPeter Maydell2014-02-201-1/+40
* target-arm: A64: Add most remaining three-reg-diff widening opsPeter Maydell2014-02-201-21/+88
* target-arm: A64: Add opcode comments to disas_simd_three_reg_diffPeter Maydell2014-02-201-11/+11
* target-arm: A64: Implement store-exclusive for system modePeter Maydell2014-02-201-6/+62
* target-arm: Fix incorrect type for value argument to write_raw_cp_regPeter Maydell2014-02-201-1/+1
* target-arm: Remove failure status return from read/write_raw_cp_regPeter Maydell2014-02-201-24/+12
* target-arm: Remove unnecessary code now read/write fns can't failPeter Maydell2014-02-202-6/+0
* target-arm: Drop success/fail return from cpreg read and write functionsPeter Maydell2014-02-204-208/+137
* target-arm: Convert miscellaneous reginfo structs to accessfnPeter Maydell2014-02-201-25/+19
* target-arm: Convert generic timer reginfo to accessfnPeter Maydell2014-02-201-56/+66
* target-arm: Convert performance monitor reginfo to accessfnPeter Maydell2014-02-201-42/+28
* target-arm: Split cpreg access checks out from read/write functionsPeter Maydell2014-02-205-4/+66
* target-arm: Stop underdecoding ARM946 PRBS registersPeter Maydell2014-02-201-23/+24
* target-arm: Log bad system register accesses with LOG_UNIMPPeter Maydell2014-02-202-1/+19
* target-arm: Remove unused ARMCPUState sr substructPeter Maydell2014-02-201-5/+0
* target-arm: Restrict check_ap() use of S and R bits to v6 and earlierPeter Maydell2014-02-201-0/+3
* target-arm: Define names for SCTLR bitsPeter Maydell2014-02-203-9/+61
* target-arm/kvm-consts.h: Define QEMU constants for known KVM CPUsPeter Maydell2014-02-201-1/+15
* target-arm: A64: Implement remaining 3-same instructionsPeter Maydell2014-02-205-4/+130
* target-arm: A64: Implement floating point pairwise insnsAlex Bennée2014-02-201-38/+86
* target-arm: A64: Implement SIMD FP compare and set insnsAlex Bennée2014-02-203-12/+207
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