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* target-arm: Implement privileged-execute-never (PXN)Peter Maydell2012-07-123-12/+26
* ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bitsPeter Maydell2012-07-121-1/+1
* target-arm: Fix TCG temp handling in 64 bit cp writesPeter Maydell2012-07-121-0/+2
* target-arm: Fix some copy-and-paste errors in cp register namesPeter Maydell2012-07-121-3/+3
* target-arm: Fix typo that meant TTBR1 accesses went to TTBR0Peter Maydell2012-07-121-1/+1
* target-arm: Fix CP15 based WFIPaul Brook2012-07-121-1/+1
* target-arm: Remove ARM_CPUID_* macrosPeter Maydell2012-06-202-52/+25
* target-arm: Remove remaining old cp15 infrastructurePeter Maydell2012-06-203-100/+1
* target-arm: Move block cache ops to new cp15 frameworkPeter Maydell2012-06-202-6/+14
* target-arm: Remove c0_cachetype CPUARMState fieldPeter Maydell2012-06-202-4/+1
* target-arm: Convert final ID registersPeter Maydell2012-06-202-50/+68
* target-arm: Convert MPIDRPeter Maydell2012-06-203-22/+31
* target-arm: Convert cp15 cache ID registersPeter Maydell2012-06-203-32/+33
* target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell2012-06-203-24/+54
* target-arm: Convert cp15 crn=1 registersPeter Maydell2012-06-203-76/+61
* target-arm: Convert cp15 crn=9 registersPeter Maydell2012-06-202-79/+59
* target-arm: Convert cp15 crn=6 registersPeter Maydell2012-06-202-53/+45
* target-arm: convert cp15 crn=7 registersPeter Maydell2012-06-203-11/+74
* target-arm: Convert cp15 VA-PA translation registersPeter Maydell2012-06-201-43/+65
* target-arm: Convert cp15 MMU TLB controlPeter Maydell2012-06-201-20/+43
* target-arm: Convert cp15 crn=15 registersPeter Maydell2012-06-203-117/+126
* target-arm: Convert cp15 crn=10 registersPeter Maydell2012-06-201-6/+5
* target-arm: Convert cp15 crn=13 registersPeter Maydell2012-06-201-30/+31
* target-arm: Convert cp15 crn=2 registersPeter Maydell2012-06-202-56/+33
* target-arm: Convert MMU fault status cp15 registersPeter Maydell2012-06-201-81/+107
* target-arm: Convert cp15 c3 registerPeter Maydell2012-06-201-6/+12
* target-arm: Convert generic timer cp15 regsPeter Maydell2012-06-201-12/+11
* target-arm: Convert performance monitor registersPeter Maydell2012-06-203-149/+158
* target-arm: Convert TLS registersPeter Maydell2012-06-202-58/+19
* target-arm: Convert WFI/barriers special cases to cp_reginfoPeter Maydell2012-06-202-51/+42
* target-arm: Convert TEECR, TEEHBR to new schemePeter Maydell2012-06-203-77/+45
* target-arm: Convert debug registers to cp_reginfoPeter Maydell2012-06-202-28/+25
* target-arm: Add register_cp_regs_for_features()Peter Maydell2012-06-203-0/+14
* target-arm: Remove old cpu_arm_set_cp_io infrastructurePeter Maydell2012-06-204-107/+1
* target-arm: initial coprocessor register frameworkPeter Maydell2012-06-207-3/+546
* target-arm: Fix 11MPCore cache type register valuePeter Maydell2012-06-201-1/+1
* build: move other target-*/ objects to nested Makefile.objsPaolo Bonzini2012-06-071-1/+2
* build: move libobj-y variable to nested Makefile.objsPaolo Bonzini2012-06-071-0/+4
* build: move obj-TARGET-y variables to nested Makefile.objsPaolo Bonzini2012-06-072-0/+510
* Kill off cpu_state_reset()Andreas Färber2012-06-041-5/+0
* target-arm: Use cpu_reset() in cpu_arm_init()Andreas Färber2012-06-041-1/+1
* target-arm/cpu.h: Make cpu_init("nonexistent cpu") return NULLPeter Maydell2012-05-101-1/+9
* target-arm: When setting FPSCR.QC, don't clear other FPSCR bitsMatt Craighead2012-05-101-1/+1
* target-arm: Make SETEND respect bswap_code (BE8) settingPeter Maydell2012-04-271-4/+4
* target-arm: Move A9 config_base_address reset value to ARMCPUPeter Maydell2012-04-272-3/+2
* target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber2012-04-274-7/+7
* target-arm: Move reset handling to arm_cpu_resetPeter Maydell2012-04-212-99/+92
* target-arm: Drop cpu_reset_model_id()Peter Maydell2012-04-211-58/+1
* target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell2012-04-213-11/+18
* target-arm: Move OMAP cp15_i_{max,min} reset to cpu_state_resetPeter Maydell2012-04-211-2/+1
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