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* target-arm/neon_helper: Remove obsolete FIXME commentPeter Maydell2012-10-191-1/+0
* target-arm/translate: Fix RRX operandsPeter Crosthwaite2012-10-171-1/+1
* target-arm: Drop unused DECODE_CPREG_CRN macroPeter Maydell2012-10-051-2/+0
* target-arm: use deposit instead of hardcoded versionAurelien Jarno2012-10-051-14/+6
* target-arm: mark a few integer helpers const and pureAurelien Jarno2012-10-051-9/+10
* target-arm: convert sar, shl and shr helpers to TCGAurelien Jarno2012-10-053-33/+43
* target-arm: convert add_cc and sub_cc helpers to TCGAurelien Jarno2012-10-053-40/+48
* target-arm: use globals for CC flagsAurelien Jarno2012-10-051-81/+46
* target-arm: Reinstate display of VFP registers in cpu_dump_statePeter Maydell2012-10-051-26/+16
* Emit debug_insn for CPU_LOG_TB_OP_OPT as well.Richard Henderson2012-09-271-1/+1
* target-arm: final conversion to AREG0 free modeBlue Swirl2012-09-155-20/+15
* target-arm: convert remaining helpersBlue Swirl2012-09-153-125/+125
* target-arm: convert void helpersBlue Swirl2012-09-153-18/+18
* target-arm: Fix potential buffer overflowStefan Weil2012-09-101-2/+2
* arm-semi: don't leak 1KB user string lock buffer upon TARGET_SYS_OPENJim Meyering2012-08-221-6/+7
* target-arm: Fix typos in commentsPeter Maydell2012-08-106-24/+24
* arm: translate: comment typo - s/middel/middle/Peter A. G. Crosthwaite2012-08-101-1/+1
* target-arm: Add support for long format translation table walksPeter Maydell2012-07-121-0/+182
* target-arm: Implement TTBCR changes for LPAEPeter Maydell2012-07-121-1/+14
* target-arm: Implement long-descriptor PAR formatPeter Maydell2012-07-121-10/+69
* target-arm: Use target_phys_addr_t in get_phys_addr()Peter Maydell2012-07-121-14/+15
* target-arm: Add 64 bit PAR, TTBR0, TTBR1 for LPAEPeter Maydell2012-07-123-3/+87
* target-arm: Add 64 bit variants of DBGDRAR and DBGDSAR for LPAEPeter Maydell2012-07-121-0/+5
* target-arm: Add AMAIR0, AMAIR1 LPAE cp15 registersPeter Maydell2012-07-121-0/+16
* target-arm: Extend feature flags to 64 bitsPeter Maydell2012-07-123-6/+6
* target-arm: Implement privileged-execute-never (PXN)Peter Maydell2012-07-123-12/+26
* ARM: Make target_phys_addr_t 64 bits and physaddrs 40 bitsPeter Maydell2012-07-121-1/+1
* target-arm: Fix TCG temp handling in 64 bit cp writesPeter Maydell2012-07-121-0/+2
* target-arm: Fix some copy-and-paste errors in cp register namesPeter Maydell2012-07-121-3/+3
* target-arm: Fix typo that meant TTBR1 accesses went to TTBR0Peter Maydell2012-07-121-1/+1
* target-arm: Fix CP15 based WFIPaul Brook2012-07-121-1/+1
* target-arm: Remove ARM_CPUID_* macrosPeter Maydell2012-06-202-52/+25
* target-arm: Remove remaining old cp15 infrastructurePeter Maydell2012-06-203-100/+1
* target-arm: Move block cache ops to new cp15 frameworkPeter Maydell2012-06-202-6/+14
* target-arm: Remove c0_cachetype CPUARMState fieldPeter Maydell2012-06-202-4/+1
* target-arm: Convert final ID registersPeter Maydell2012-06-202-50/+68
* target-arm: Convert MPIDRPeter Maydell2012-06-203-22/+31
* target-arm: Convert cp15 cache ID registersPeter Maydell2012-06-203-32/+33
* target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell2012-06-203-24/+54
* target-arm: Convert cp15 crn=1 registersPeter Maydell2012-06-203-76/+61
* target-arm: Convert cp15 crn=9 registersPeter Maydell2012-06-202-79/+59
* target-arm: Convert cp15 crn=6 registersPeter Maydell2012-06-202-53/+45
* target-arm: convert cp15 crn=7 registersPeter Maydell2012-06-203-11/+74
* target-arm: Convert cp15 VA-PA translation registersPeter Maydell2012-06-201-43/+65
* target-arm: Convert cp15 MMU TLB controlPeter Maydell2012-06-201-20/+43
* target-arm: Convert cp15 crn=15 registersPeter Maydell2012-06-203-117/+126
* target-arm: Convert cp15 crn=10 registersPeter Maydell2012-06-201-6/+5
* target-arm: Convert cp15 crn=13 registersPeter Maydell2012-06-201-30/+31
* target-arm: Convert cp15 crn=2 registersPeter Maydell2012-06-202-56/+33
* target-arm: Convert MMU fault status cp15 registersPeter Maydell2012-06-201-81/+107
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