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* tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson2015-08-242-53/+53
* target-arm: Add AArch32 banked register access to secure physical timerPeter Maydell2015-08-131-0/+27
* target-arm: Add the AArch64 view of the Secure physical timerPeter Maydell2015-08-134-1/+92
* target-arm: Add debug check for mismatched cpreg resetsPeter Maydell2015-08-133-1/+27
* Introduce gic_class_name() instead of repeating conditionPavel Fedin2015-08-131-0/+5
* target-arm: Add the Hypervisor timerEdgar E. Iglesias2015-08-134-1/+73
* target-arm: Pass timeridx as argument to various timer functionsEdgar E. Iglesias2015-08-131-22/+77
* target-arm: Rename and move gt_cnt_resetEdgar E. Iglesias2015-08-131-7/+5
* target-arm: Add CNTHCTL_EL2Edgar E. Iglesias2015-08-132-2/+32
* target-arm: Add CNTVOFF_EL2Edgar E. Iglesias2015-08-132-6/+42
* target-arm: kvm: Differentiate registers based on write-back levelsChristoffer Dall2015-07-216-6/+76
* target-arm: Fix broken SCTLR_EL3 resetPeter Maydell2015-07-151-0/+1
* disas: arm: QOMify target specific disas setupPeter Crosthwaite2015-07-091-0/+35
* cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
* cpu: Change cpu_exec_init() arg to cpu, not envPeter Crosthwaite2015-07-091-1/+1
* cpu: Add Error argument to cpu_exec_init()Bharata B Rao2015-07-091-1/+1
* crypto: move built-in AES implementation into crypto/Daniel P. Berrange2015-07-071-1/+1
* target-arm: Implement YIELD insn to yield in ARM and Thumb translatorsPeter Maydell2015-07-061-0/+7
* target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell2015-07-064-3/+23
* target-arm: fix write helper for TLBI ALLE1ISSergey Fedorov2015-07-061-1/+1
* target-arm: A64: Print ELR when taking exceptionsSoren Brinkmann2015-06-261-0/+2
* target-arm: default empty semihosting cmdlineLiviu Ionescu2015-06-261-2/+9
* Include qapi/qmp/qerror.h exactly where neededMarkus Armbruster2015-06-221-1/+0
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-222-2/+2
* semihosting: add --semihosting-config arg sub-argumentLeon Alrae2015-06-191-7/+3
* semihosting: create SemihostingConfig structure and semihost.hLeon Alrae2015-06-191-3/+4
* target-arm: Add support for Cortex-R5Peter Crosthwaite2015-06-191-0/+38
* target-arm: Implement PMSAv7 MPUPeter Crosthwaite2015-06-192-1/+174
* target-arm: Add registers for PMSAv7Peter Crosthwaite2015-06-194-7/+133
* target-arm/helper.c: define MPUIR registerPeter Crosthwaite2015-06-193-0/+30
* target-arm: Do not reset sysregs marked as ALIASSergey Fedorov2015-06-193-22/+12
* target-arm: Add the Cortex-M4 CPUAurelio C. Remonda2015-06-191-0/+11
* target-arm: Correct "preferred return address" for cpreg access exceptionsPeter Maydell2015-06-151-1/+1
* arm: helper: rename get_phys_addr_mpuPeter Crosthwaite2015-06-151-5/+5
* arm: Add has-mpu propertyPeter Crosthwaite2015-06-152-0/+16
* arm: Implement uniprocessor with MP configPeter Crosthwaite2015-06-152-2/+7
* arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite2015-06-153-64/+78
* arm: helper: Factor out CP regs common to [pv]msaPeter Crosthwaite2015-06-151-9/+14
* arm: Don't add v7mp registers in MPU systemsPeter Crosthwaite2015-06-151-1/+2
* arm: Do not define TLBTR in PMSA systemsPeter Crosthwaite2015-06-151-3/+10
* target-arm: Add the THUMB_DSP featureAurelio C. Remonda2015-06-153-10/+107
* target-arm: Use the kernel's idea of MPIDR if we're using KVMPavel Fedin2015-06-156-8/+63
* target-arm: add AArch32 MIDR aliases in ARMv8Sergey Fedorov2015-06-151-3/+7
* target-arm: Fix REVIDR reset valueSergey Fedorov2015-06-153-3/+5
* target-arm/kvm64: Add cortex-a53 cpu supportShannon Zhao2015-06-152-0/+5
* target-arm/cpu.h: remove pending_exceptionAlex Bennée2015-06-151-1/+0
* target-arm: use extended address bits from supersection short descriptorSergey Fedorov2015-06-151-0/+2
* target-arm: Handle "extended small page" descriptors correctlyPeter Maydell2015-06-151-4/+9
* migration: Use normal VMStateDescriptions for SubsectionsJuan Quintela2015-06-121-16/+10
* target-arm: Remove v8_ prefix from names of non-v8-specific cpreg arraysPeter Maydell2015-06-021-4/+4
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