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path: root/target-arm/translate.h
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* target-arm: Introduce DisasCompareRichard Henderson2015-09-141-0/+9
* target-arm: Share all common TCG temporariesRichard Henderson2015-09-141-0/+8
* target-arm: Fix default_exception_el() function for the case when EL3 is not ...Sergey Sorokin2015-09-081-2/+3
* target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell2015-07-061-0/+1
* target-arm: Extend FP checks to use an ELGreg Bellows2015-05-291-1/+1
* target-arm: Add exception target el infrastructureGreg Bellows2015-05-291-0/+15
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-2/+2
* target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell2015-02-051-1/+2
* target-arm: add non-secure Translation Block flagSergey Fedorov2014-12-111-0/+1
* target-arm: rename arm_current_pl to arm_current_elGreg Bellows2014-10-241-2/+2
* target-arm: Add support for A32 and T32 HVC and SMC insnsPeter Maydell2014-10-241-0/+2
* target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell2014-09-291-0/+2
* target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell2014-08-191-0/+12
* target-arm: Use a 1:1 mapping between EL and MMU indexEdgar E. Iglesias2014-05-271-5/+1
* target-arm: Move get_mem_index to translate.hEdgar E. Iglesias2014-05-271-0/+9
* target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32Peter Maydell2014-04-171-0/+8
* target-arm: A64: Add assertion that FP access was checkedPeter Maydell2014-04-171-0/+8
* target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell2014-04-171-1/+2
* target-arm: Add support for generating exceptions with syndrome informationPeter Maydell2014-04-171-0/+4
* target-arm: A64: Implement PMULL instructionPeter Maydell2014-03-171-0/+6
* target-arm: Implement WFE as a yield operationPeter Maydell2014-03-101-0/+2
* target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoderPeter Maydell2014-01-071-0/+2
* target-arm: A64: add support for conditional branchesAlexander Graf2013-12-171-0/+2
* target-arm: A64: add support for B and BL insnsAlexander Graf2013-12-171-0/+3
* target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()Peter Maydell2013-12-171-2/+18
* target-arm: Add AArch64 translation stubAlexander Graf2013-09-101-0/+19
* target-arm: Prepare translation for AArch64 codeAlexander Graf2013-09-101-0/+1
* target-arm: Export cpu_envAlexander Graf2013-09-101-0/+2
* target-arm: Extract the disas struct to a header fileAlexander Graf2013-09-101-0/+27
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