| Commit message (Expand) | Author | Age | Files | Lines |
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| * | target-arm: Rename A32 VFP conversion helpers | Will Newton | 2014-01-08 | 1 | -11/+13 |
| * | target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum | Peter Maydell | 2014-01-08 | 1 | -8/+8 |
| * | target-arm: Widen exclusive-access support struct fields to 64 bits | Peter Maydell | 2014-01-08 | 1 | -26/+39 |
| * | target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder | Peter Maydell | 2014-01-07 | 1 | -3/+4 |
| * | target-arm: A64: add support for conditional branches | Alexander Graf | 2013-12-17 | 1 | -5/+9 |
| * | target-arm: Split A64 from A32/T32 gen_intermediate_code_internal() | Peter Maydell | 2013-12-17 | 1 | -38/+24 |
| * | target-arm: add support for v8 AES instructions | Ard Biesheuvel | 2013-12-17 | 1 | -0/+26 |
| * | target-arm: Use new qemu_ld/st opcodes | Richard Henderson | 2013-12-10 | 1 | -31/+25 |
| * | target-arm: Implement ARMv8 SIMD VMAXNM and VMINNM instructions. | Will Newton | 2013-12-10 | 1 | -9/+22 |
| * | target-arm: Implement ARMv8 FP VMAXNM and VMINNM instructions. | Will Newton | 2013-12-10 | 1 | -0/+50 |
| * | target-arm: Implement ARMv8 VSEL instruction. | Will Newton | 2013-12-10 | 1 | -1/+134 |
| * | target-arm: Move call to disas_vfp_insn out of disas_coproc_insn. | Will Newton | 2013-12-10 | 1 | -5/+27 |
| * | tcg: Move helper registration into tcg_context_init | Richard Henderson | 2013-10-10 | 1 | -3/+0 |
| * | target-arm: Add AArch64 translation stub | Alexander Graf | 2013-09-10 | 1 | -3/+11 |
| * | target-arm: Prepare translation for AArch64 code | Alexander Graf | 2013-09-10 | 1 | -9/+29 |
| * | target-arm: Pass DisasContext* to gen_set_pc_im() | Peter Maydell | 2013-09-10 | 1 | -13/+13 |
| * | target-arm: Fix target_ulong/uint32_t confusions | Alexander Graf | 2013-09-10 | 1 | -4/+5 |
| * | target-arm: Export cpu_env | Alexander Graf | 2013-09-10 | 1 | -1/+1 |
| * | target-arm: Extract the disas struct to a header file | Alexander Graf | 2013-09-10 | 1 | -23/+1 |
| * | target-arm: Abstract out load/store from a vaddr in AArch32 | Peter Maydell | 2013-09-10 | 1 | -124/+210 |
| * | target-arm: Use sextract32() in branch decode | Peter Maydell | 2013-09-10 | 1 | -2/+3 |
| * | Merge remote-tracking branch 'mjt/trivial-patches' into staging | Anthony Liguori | 2013-09-03 | 1 | -0/+4 |
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| | * | target-arm: Report unimplemented opcodes (LOG_UNIMP) | Stefan Weil | 2013-09-01 | 1 | -0/+4 |
| * | | tcg: Change tcg_gen_exit_tb argument to uintptr_t | Richard Henderson | 2013-09-02 | 1 | -1/+1 |
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| * | target-arm: Support coprocessor registers which do I/O | Peter Maydell | 2013-08-20 | 1 | -3/+13 |
| * | cpu: Move singlestep_enabled field from CPU_COMMON to CPUState | Andreas Färber | 2013-07-23 | 1 | -3/+4 |
| * | target-arm: explicitly decode SEVL instruction | Mans Rullgard | 2013-07-15 | 1 | -1/+2 |
| * | target-arm: implement LDA/STL instructions | Mans Rullgard | 2013-07-15 | 1 | -10/+119 |
| * | target-arm: add feature flag for ARMv8 | Mans Rullgard | 2013-07-15 | 1 | -0/+1 |
| * | target-arm: Change gen_intermediate_code_internal() argument to ARMCPU | Andreas Färber | 2013-07-09 | 1 | -4/+5 |
| * | cpu: Turn cpu_dump_{state,statistics}() into CPUState hooks | Andreas Färber | 2013-06-28 | 1 | -2/+4 |
| * | Merge remote-tracking branch 'pmaydell/target-arm.next' into staging | Anthony Liguori | 2013-06-14 | 1 | -1/+1 |
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| | * | Fix rfe instruction | Peter Chubb | 2013-06-03 | 1 | -1/+1 |
| * | | Remove unnecessary break statements | Stefan Weil | 2013-06-01 | 1 | -1/+0 |
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| * | target-arm: Remove gen_{ld,st}* definitions | Peter Maydell | 2013-05-26 | 1 | -46/+0 |
| * | target-arm: Remove gen_{ld,st}* from thumb2 decoder | Peter Maydell | 2013-05-26 | 1 | -10/+20 |
| * | target-arm: Remove gen_{ld,st}* from Thumb insns | Peter Maydell | 2013-05-26 | 1 | -25/+46 |
| * | target-arm: Remove gen_{ld,st}* from basic ARM insns | Peter Maydell | 2013-05-26 | 1 | -32/+69 |
| * | target-arm: Remove use of gen_{ld,st}* from ldrex/strex | Peter Maydell | 2013-05-26 | 1 | -13/+18 |
| * | target-arm: Remove uses of gen_{ld,st}* from Neon code | Peter Maydell | 2013-05-26 | 1 | -18/+28 |
| * | target-arm: Remove uses of gen_{ld,st}* from iWMMXt code | Peter Maydell | 2013-05-26 | 1 | -8/+10 |
| * | target-arm: Remove gen_ld64() and gen_st64() | Peter Maydell | 2013-05-26 | 1 | -15/+4 |
| * | target-arm: Don't use TCGv when we mean TCGv_i32 | Peter Maydell | 2013-05-26 | 1 | -224/+229 |
| * | target-arm: Reinsert missing return statement in ARM mode SRS decode | Peter Chubb | 2013-04-19 | 1 | -0/+1 |
| * | target-arm: Don't decode RFE or SRS on M profile cores | Peter Maydell | 2013-03-05 | 1 | -2/+3 |
| * | target-arm: Factor out handling of SRS instruction | Peter Maydell | 2013-03-05 | 1 | -67/+69 |
| * | gen-icount.h: Rename gen_icount_start/end to gen_tb_start/end | Peter Maydell | 2013-03-03 | 1 | -2/+2 |
| * | target-arm: Fix sbc_CC carry | Richard Henderson | 2013-02-25 | 1 | -24/+4 |
| * | arm/translate.c: Fix adc_CC/sbc_CC implementation | Peter Crosthwaite | 2013-02-25 | 1 | -2/+2 |
| * | target-arm: Implement sbc_cc inline | Richard Henderson | 2013-02-23 | 1 | -8/+39 |
