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path: root/target-arm/translate-a64.c
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* target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell2015-07-061-0/+6
* disas: Remove uses of CPU envPeter Crosthwaite2015-06-221-1/+1
* target-arm: Don't halt on WFI unless we don't have any workPeter Maydell2015-05-291-0/+4
* target-arm: Extend FP checks to use an ELGreg Bellows2015-05-291-4/+4
* target-arm: Make singlestate TB flags common between AArch32/64Peter Maydell2015-05-291-2/+2
* target-arm: Add exception target el infrastructureGreg Bellows2015-05-291-12/+22
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-13/+13
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150212' into stagingPeter Maydell2015-02-131-7/+3
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| * tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-6/+3
| * tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+0
* | target-arm: A64: Avoid signed shifts in disas_ldst_pair()Peter Maydell2015-02-131-1/+1
* | target-arm: A64: Avoid left shifting negative integers in disas_pc_rel_addrPeter Maydell2015-02-131-2/+3
* | target-arm: A64: Fix handling of rotate in logic_imm_decode_wmaskPeter Maydell2015-02-131-1/+4
* | target-arm: A64: Fix shifts into sign bitPeter Maydell2015-02-131-3/+3
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* target-arm: Use correct mmu_idx for unprivileged loads and storesPeter Maydell2015-02-051-1/+18
* target-arm: Define correct mmu_idx values and pass them in TB flagsPeter Maydell2015-02-051-2/+3
* target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STTPeter Maydell2015-02-051-1/+1
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-2/+2
* target-arm: A64: remove redundant storeAlex Bennée2014-11-021-1/+0
* target-arm: rename arm_current_pl to arm_current_elGreg Bellows2014-10-241-8/+8
* target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell2014-10-241-2/+2
* target-arm: A64: Emulate the SMC insnEdgar E. Iglesias2014-09-291-0/+13
* target-arm: A64: Emulate the HVC insnEdgar E. Iglesias2014-09-291-9/+22
* target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell2014-08-191-5/+86
* target-arm: A64: Avoid duplicate exit_tb(0) in non-linked goto_tbPeter Maydell2014-08-191-2/+3
* target-arm: Fix return address for A64 BRK instructionsPeter Maydell2014-08-191-1/+1
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+2
* target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv()Peter Maydell2014-06-191-1/+1
* target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int()Peter Maydell2014-06-191-1/+2
* target-arm: A64: Implement two-register SHA instructionsPeter Maydell2014-06-091-1/+44
* target-arm: A64: Implement 3-register SHA instructionsPeter Maydell2014-06-091-1/+58
* target-arm: A64: Implement AES instructionsPeter Maydell2014-06-091-1/+50
* target-arm: A64: Implement CRC instructionsPeter Maydell2014-06-091-1/+53
* target-arm: A64: Use PMULL feature bit for PMULLPeter Maydell2014-06-091-1/+1
* target-arm: move arm_*_code to a separate filePaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* target-arm: A64: Trap ERET from EL0 at translation timeEdgar E. Iglesias2014-05-271-0/+4
* target-arm: Move get_mem_index to translate.hEdgar E. Iglesias2014-05-271-9/+0
* target-arm: A64: Handle blr lrEdgar E. Iglesias2014-05-011-1/+2
* target-arm: implement WFE/YIELD as a yield for AArch64Rob Herring2014-05-011-0/+6
* target-arm: A64: fix unallocated test of scalar SQXTUNAlex Bennée2014-04-171-1/+1
* target-arm: Implement AArch64 EL1 exception handlingRob Herring2014-04-171-0/+3
* target-arm: A64: Implement DC ZVAPeter Maydell2014-04-171-0/+5
* target-arm: A64: Add assertion that FP access was checkedPeter Maydell2014-04-171-24/+51
* target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN setPeter Maydell2014-04-171-5/+295
* target-arm: Add support for generating exceptions with syndrome informationPeter Maydell2014-04-171-14/+35
* target-arm: Provide correct syndrome information for cpreg access trapsPeter Maydell2014-04-171-1/+7
* target-arm: Split out private-to-target functions into internals.hPeter Maydell2014-04-171-0/+1
* target-arm: Fix A64 Neon MLSPeter Maydell2014-03-241-1/+1
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