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path: root/target-arm/op_helper.c
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* target-arm: Raw CPSR writes should skip checks and bank switchingPeter Maydell2019-11-291-1/+4
* target-arm: Add write_type argument to cpsr_write()Peter Maydell2019-11-291-3/+3
* target-arm: Give CPSR setting on 32-bit exception return its own helperPeter Maydell2019-11-291-0/+6
* target-arm: UNDEF in the UNPREDICTABLE SRS-from-System casePeter Maydell2019-11-291-0/+8
* target-arm: Combine user-only and softmmu get/set_r13_banked()Peter Maydell2019-11-291-19/+0
* target-arm: Move get/set_r13_banked() to op_helper.cPeter Maydell2019-11-291-0/+37
* target-arm: Report correct syndrome for FPEXC32_EL2 trapsPeter Maydell2019-11-291-0/+13
* target-arm: Fix handling of SCR.SMDPeter Maydell2019-11-291-5/+7
* target-arm: Implement checking of fired watchpointSergey Fedorov2019-11-291-14/+21
* target-arm: Add isread parameter to CPAccessFnsPeter Maydell2019-11-291-2/+3
* target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM modePeter Maydell2019-11-291-1/+5
* target-arm: Implement remaining illegal return event checksPeter Maydell2019-11-291-0/+10
* target-arm: Handle exception return from AArch64 to non-EL0 AArch32Peter Maydell2019-11-291-21/+59
* target-arm: Clean up includesPeter Maydell2019-11-291-0/+1
* target-arm: Use the right MMU index in arm_regime_using_lpae_formatAlvise Rigo2019-11-291-1/+1
* target-arm: raise exception on misaligned LDREX operandsAndrew Baumann2019-11-291-1/+39
* Initial overlay of HQEMU 2.5.2 changes onto underlying 2.5.0 QEMU GIT tree2.5_overlayTimothy Pearson2019-11-291-0/+10
* target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()Sergey Fedorov2015-11-101-1/+7
* target-arm: Add and use symbolic names for register banksSoren Brinkmann2015-11-031-4/+4
* target-arm: Add support for S1 + S2 MMU translationsEdgar E. Iglesias2015-10-271-0/+1
* target-arm: Route S2 MMU faults to EL2Edgar E. Iglesias2015-10-271-2/+8
* target-arm: Add S2 translation to 64bit S1 PTWsEdgar E. Iglesias2015-10-271-2/+2
* target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias2015-10-271-1/+2
* target-arm: Fix CPU breakpoint handlingSergey Fedorov2015-10-161-11/+18
* target-arm: Fix GDB breakpoint handlingSergey Fedorov2015-10-161-0/+6
* target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell2015-08-251-0/+8
* target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell2015-07-061-3/+15
* arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite2015-06-151-5/+6
* target-arm: Correct check for non-EL3Edgar E. Iglesias2015-06-021-1/+1
* target-arm: Add WFx instruction trap supportGreg Bellows2015-05-291-1/+59
* target-arm: Don't halt on WFI unless we don't have any workPeter Maydell2015-05-291-0/+7
* target-arm: Allow cp access functions to indicate traps to EL2 or EL3Peter Maydell2015-05-291-1/+14
* target-arm: Make raise_exception() take syndrome and target ELPeter Maydell2015-05-291-40/+28
* target-arm: Set exception target EL in tlb_fillPeter Maydell2015-05-291-0/+1
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-2/+25
* target-arm: Set correct syndrome for faults on MSR DAIF*, immPeter Maydell2015-05-291-0/+3
* target-arm: Extend helpers to route exceptionsGreg Bellows2015-05-291-0/+21
* target-arm: Add exception target el infrastructureGreg Bellows2015-05-291-1/+2
* target-arm: Check watchpoints against CPU security statePeter Maydell2015-04-261-2/+4
* target-arm: Use attribute info to handle user-only watchpointsPeter Maydell2015-04-261-11/+12
* target-arm: Add 32/64-bit register syncGreg Bellows2015-02-131-4/+2
* target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler2014-12-111-1/+1
* target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler2014-12-111-1/+1
* target-arm: A32: Emulate the SMC instructionFabian Aggeler2014-10-241-2/+1
* target-arm: rename arm_current_pl to arm_current_elGreg Bellows2014-10-241-8/+8
* target-arm: add emulation of PSCI calls for system emulationRob Herring2014-10-241-0/+16
* target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell2014-10-241-7/+10
* target-arm: A64: Emulate the SMC insnEdgar E. Iglesias2014-09-291-0/+26
* target-arm: A64: Emulate the HVC insnEdgar E. Iglesias2014-09-291-0/+31
* target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell2014-09-291-0/+11
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