summaryrefslogtreecommitdiffstats
path: root/target-arm/op_helper.c
Commit message (Expand)AuthorAgeFilesLines
* target-arm: Fix gdb singlestep handling in arm_debug_excp_handler()Sergey Fedorov2015-11-101-1/+7
* target-arm: Add and use symbolic names for register banksSoren Brinkmann2015-11-031-4/+4
* target-arm: Add support for S1 + S2 MMU translationsEdgar E. Iglesias2015-10-271-0/+1
* target-arm: Route S2 MMU faults to EL2Edgar E. Iglesias2015-10-271-2/+8
* target-arm: Add S2 translation to 64bit S1 PTWsEdgar E. Iglesias2015-10-271-2/+2
* target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias2015-10-271-1/+2
* target-arm: Fix CPU breakpoint handlingSergey Fedorov2015-10-161-11/+18
* target-arm: Fix GDB breakpoint handlingSergey Fedorov2015-10-161-0/+6
* target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell2015-08-251-0/+8
* target-arm: Split DISAS_YIELD from DISAS_WFEPeter Maydell2015-07-061-3/+15
* arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite2015-06-151-5/+6
* target-arm: Correct check for non-EL3Edgar E. Iglesias2015-06-021-1/+1
* target-arm: Add WFx instruction trap supportGreg Bellows2015-05-291-1/+59
* target-arm: Don't halt on WFI unless we don't have any workPeter Maydell2015-05-291-0/+7
* target-arm: Allow cp access functions to indicate traps to EL2 or EL3Peter Maydell2015-05-291-1/+14
* target-arm: Make raise_exception() take syndrome and target ELPeter Maydell2015-05-291-40/+28
* target-arm: Set exception target EL in tlb_fillPeter Maydell2015-05-291-0/+1
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-2/+25
* target-arm: Set correct syndrome for faults on MSR DAIF*, immPeter Maydell2015-05-291-0/+3
* target-arm: Extend helpers to route exceptionsGreg Bellows2015-05-291-0/+21
* target-arm: Add exception target el infrastructureGreg Bellows2015-05-291-1/+2
* target-arm: Check watchpoints against CPU security statePeter Maydell2015-04-261-2/+4
* target-arm: Use attribute info to handle user-only watchpointsPeter Maydell2015-04-261-11/+12
* target-arm: Add 32/64-bit register syncGreg Bellows2015-02-131-4/+2
* target-arm: make c13 cp regs banked (FCSEIDR, ...)Fabian Aggeler2014-12-111-1/+1
* target-arm: add SCTLR_EL3 and make SCTLR bankedFabian Aggeler2014-12-111-1/+1
* target-arm: A32: Emulate the SMC instructionFabian Aggeler2014-10-241-2/+1
* target-arm: rename arm_current_pl to arm_current_elGreg Bellows2014-10-241-8/+8
* target-arm: add emulation of PSCI calls for system emulationRob Herring2014-10-241-0/+16
* target-arm: Handle SMC/HVC undef-if-no-ELx in pre_* helpersPeter Maydell2014-10-241-7/+10
* target-arm: A64: Emulate the SMC insnEdgar E. Iglesias2014-09-291-0/+26
* target-arm: A64: Emulate the HVC insnEdgar E. Iglesias2014-09-291-0/+31
* target-arm: Don't handle c15_cpar changes via tb_flush()Peter Maydell2014-09-291-0/+11
* target-arm: Implement handling of breakpoint firingPeter Maydell2014-09-291-15/+60
* target-arm: Implement handling of fired watchpointsPeter Maydell2014-09-121-0/+188
* target-arm: Implement ARMv8 single-step handling for A64 codePeter Maydell2014-08-191-0/+5
* target-arm: Set PSTATE.SS correctly on exception return from AArch64Peter Maydell2014-08-191-0/+20
* target-arm: Don't allow AArch32 to access RES0 CPSR bitsPeter Maydell2014-08-191-1/+1
* target-arm: A64: Respect SPSEL in ERET SP restoreEdgar E. Iglesias2014-08-041-1/+1
* target-arm: A64: Break out aarch64_save/restore_spEdgar E. Iglesias2014-08-041-5/+1
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-2/+1
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-1/+1
* target-arm: A64: Generalize ERET to various ELsEdgar E. Iglesias2014-05-271-5/+6
* target-arm: A64: Forbid ERET to higher or unimplemented ELsEdgar E. Iglesias2014-05-271-2/+6
* target-arm: A64: Introduce aarch64_banked_spsr_index()Edgar E. Iglesias2014-05-271-1/+2
* target-arm: Make elr_el1 an arrayEdgar E. Iglesias2014-05-271-3/+3
* target-arm: Correct a comment refering to EL0Edgar E. Iglesias2014-05-011-1/+1
* target-arm: Implement AArch64 EL1 exception handlingRob Herring2014-04-171-0/+60
* target-arm: Implement SP_EL0, SP_EL1Peter Maydell2014-04-171-1/+1
OpenPOWER on IntegriCloud