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* target-arm: Make vbar_write 64bit friendly on 32bit hostsEdgar E. Iglesias2014-05-011-1/+1
* target-arm: Implement XScale cache lockdown operations as NOPsPeter Maydell2014-05-011-0/+15
* target-arm: Implement CBAR for Cortex-A57Peter Maydell2014-04-171-6/+33
* target-arm: Implement RVBAR registerPeter Maydell2014-04-171-0/+6
* target-arm: Implement AArch64 address translation operationsPeter Maydell2014-04-171-29/+24
* target-arm: Implement auxiliary fault status registersPeter Maydell2014-04-171-0/+9
* target-arm: Replace wildcarded cpreg definitions with precise ones for ARMv8Peter Maydell2014-04-171-5/+91
* target-arm: Don't expose wildcard ID register definitions for ARMv8Peter Maydell2014-04-171-18/+43
* target-arm: Implement ISR_EL1 registerPeter Maydell2014-04-171-0/+18
* target-arm: Implement AArch64 view of ACTLRPeter Maydell2014-04-171-1/+2
* target-arm: Implement AArch64 view of CONTEXTIDRPeter Maydell2014-04-171-15/+18
* target-arm: Implement AArch64 views of AArch32 ID registersPeter Maydell2014-04-171-29/+44
* target-arm: Implement ARMv8 MVFR registersPeter Maydell2014-04-171-0/+12
* target-arm: Move arm_log_exception() into internals.hPeter Maydell2014-04-171-31/+0
* target-arm: Implement AArch64 SPSR_EL1Peter Maydell2014-04-171-0/+4
* target-arm: Implement SP_EL0, SP_EL1Peter Maydell2014-04-171-0/+34
* target-arm: Add AArch64 ELR_EL1 register.Peter Maydell2014-04-171-0/+4
* target-arm: Implement AArch64 views of fault status and data registersRob Herring2014-04-171-13/+25
* target-arm: Use dedicated CPU state fields for ARM946 access bit registersPeter Maydell2014-04-171-10/+14
* target-arm: A64: Implement DC ZVAPeter Maydell2014-04-171-5/+117
* target-arm: Don't mention PMU in debug feature registerPeter Maydell2014-04-171-1/+6
* target-arm: Add v8 mmu translation supportRob Herring2014-04-171-32/+77
* target-arm: Provide syndrome information for MMU faultsRob Herring2014-04-171-0/+12
* target-arm: Define exception record for AArch64 exceptionsPeter Maydell2014-04-171-9/+14
* target-arm: Implement AArch64 DAIF system registerPeter Maydell2014-04-171-0/+20
* target-arm: Split out private-to-target functions into internals.hPeter Maydell2014-04-171-0/+1
* target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)Alex Bennée2014-03-171-27/+106
* target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPEAlex Bennée2014-03-171-35/+163
* target-arm: Add ARM_CP_IO notation to PMCR reginfoPeter Maydell2014-03-171-0/+1
* misc: Fix typos in commentsStefan Weil2014-03-151-1/+1
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-1/+1
* cputlb: Change tlb_flush() argument to CPUStateAndreas Färber2014-03-131-10/+29
* cputlb: Change tlb_flush_page() argument to CPUStateAndreas Färber2014-03-131-4/+10
* exec: Change cpu_abort() argument to CPUStateAndreas Färber2014-03-131-10/+25
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-14/+11
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-131-4/+9
* cpu: Factor out cpu_generic_init()Andreas Färber2014-03-131-13/+1
* target-arm: Clean up ENV_GET_CPU() usageAndreas Färber2014-03-131-5/+7
* target-arm: Implements the ARM PMCCNTR registerAlistair Francis2014-03-101-4/+85
* target-arm: Fix incorrect setting of E bit in CPSRPeter Maydell2014-03-101-1/+1
* target-arm: Add support for AArch32 ARMv8 CRC32 instructionsWill Newton2014-02-261-0/+39
* target-arm: Implement AArch64 view of CPACRPeter Maydell2014-02-261-1/+2
* target-arm: Store AIF bits in env->pstate for AArch32Peter Maydell2014-02-261-12/+17
* target-arm: Implement AArch64 OSLAR_EL1 sysreg as WIPeter Maydell2014-02-261-0/+4
* target-arm: Implement AArch64 dummy breakpoint and watchpoint registersPeter Maydell2014-02-261-0/+32
* target-arm: Implement AArch64 ID and feature registersPeter Maydell2014-02-261-0/+45
* target-arm: Implement AArch64 generic timersPeter Maydell2014-02-261-11/+72
* target-arm: Implement AArch64 MPIDRPeter Maydell2014-02-261-2/+4
* target-arm: Implement AArch64 TTBR*Peter Maydell2014-02-261-59/+30
* target-arm: Implement AArch64 VBAR_EL1Peter Maydell2014-02-261-1/+8
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