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path: root/target-arm/helper-a64.c
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* target-arm: Implement AArch64 EL1 exception handlingRob Herring2014-04-171-0/+76
* target-arm: A64: Implement FCVTXNPeter Maydell2014-03-171-0/+23
* target-arm: A64: Add FRECPX (reciprocal exponent)Alex Bennée2014-03-171-0/+59
* target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALPPeter Maydell2014-03-171-0/+61
* target-arm: A64: Add remaining CLS/Z vector opsAlex Bennée2014-03-171-0/+5
* target-arm: A64: Implement PMULL instructionPeter Maydell2014-03-171-0/+30
* target-arm: A64: Implement remaining 3-same instructionsPeter Maydell2014-02-201-0/+60
* target-arm: A64: Implement SIMD FP compare and set insnsAlex Bennée2014-02-201-0/+19
* target-arm: A64: Implement plain vector SIMD indexed element insnsPeter Maydell2014-02-201-0/+26
* target-arm: A64: Add SIMD TBL/TBLXMichael Matz2014-01-311-0/+31
* target-arm: A64: Add support for floating point compareClaudio Fontana2014-01-081-0/+45
* target-arm: A64: add support for 1-src CLS insnClaudio Fontana2013-12-171-0/+10
* target-arm: A64: add support for 1-src RBIT insnAlexander Graf2013-12-171-0/+18
* target-arm: A64: add support for 1-src data processing and CLZClaudio Fontana2013-12-171-0/+5
* target-arm: A64: add support for 2-src data processing and DIVAlexander Graf2013-12-171-0/+21
* target-arm: A64: add stubs for a64 specific helpersAlexander Graf2013-12-171-0/+25
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