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path:
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/
target-arm
/
cpu64.c
Commit message (
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)
Author
Age
Files
Lines
*
target-arm: cpu64: Add support for Cortex-A53
Peter Crosthwaite
2015-05-18
1
-0
/
+51
*
target-arm: cpu64: generalise name of A57 regs
Peter Crosthwaite
2015-05-18
1
-5
/
+5
*
target-arm: Add missing compatible property to A57
Ryota Ozaki
2015-03-11
1
-0
/
+1
*
target-arm: Add CPU property to disable AArch64
Greg Bellows
2015-02-13
1
-0
/
+39
*
target-arm: Report a valid L1Ip field in CTR_EL0 for CPU type "any"
Peter Maydell
2014-10-24
1
-1
/
+1
*
target-arm: do not set do_interrupt handlers for ARM and AArch64 user modes
Rob Herring
2014-10-24
1
-0
/
+2
*
target-arm: Use cpu_exec_interrupt qom hook
Richard Henderson
2014-09-25
1
-0
/
+1
*
target-arm: Correct Cortex-A57 ISAR5 and AA64ISAR0 ID register values
Peter Maydell
2014-08-29
1
-1
/
+2
*
target-arm: Adjust debug ID registers per-CPU
Peter Maydell
2014-08-19
1
-0
/
+1
*
target-arm: VFPv4 implies half-precision extension
Peter Maydell
2014-06-09
1
-2
/
+0
*
target-arm: Clean up handling of ARMv8 optional feature bits
Peter Maydell
2014-06-09
1
-0
/
+10
*
target-arm: Remove unnecessary setting of feature bits
Peter Maydell
2014-06-09
1
-2
/
+0
*
target-arm/cpu64.c: Actually register Cortex-A57 impdef registers
Peter Maydell
2014-06-09
1
-0
/
+1
*
target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32
Peter Maydell
2014-04-17
1
-1
/
+0
*
target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pc
Peter Maydell
2014-04-17
1
-4
/
+8
*
target-arm: Implement CBAR for Cortex-A57
Peter Maydell
2014-04-17
1
-0
/
+1
*
target-arm: Implement Cortex-A57 implementation-defined system registers
Peter Maydell
2014-04-17
1
-0
/
+55
*
target-arm: Remove THUMB2EE feature from AArch64 'any' CPU
Peter Maydell
2014-04-17
1
-1
/
+0
*
target-arm: Add Cortex-A57 processor
Peter Maydell
2014-04-17
1
-0
/
+43
*
target-arm: Implement AArch64 EL1 exception handling
Rob Herring
2014-04-17
1
-0
/
+1
*
target-arm: A64: Implement DC ZVA
Peter Maydell
2014-04-17
1
-0
/
+1
*
target-arm: A64: Make cache ID registers visible to AArch64
Peter Maydell
2014-02-26
1
-0
/
+1
*
target-arm: Switch ARMCPUInfo arrays to use terminator entries
Peter Maydell
2014-01-14
1
-9
/
+6
*
target-arm: fix build with gcc 4.8.2
Michael S. Tsirkin
2014-01-08
1
-0
/
+6
*
target-arm: A64: add set_pc cpu method
Alexander Graf
2013-12-17
1
-0
/
+11
*
target-arm: Add AArch64 gdbstub support
Alexander Graf
2013-09-10
1
-0
/
+4
*
target-arm: Add AArch64 translation stub
Alexander Graf
2013-09-10
1
-0
/
+3
*
target-arm: Add new AArch64CPUInfo base class and subclasses
Peter Maydell
2013-09-10
1
-0
/
+111