summaryrefslogtreecommitdiffstats
path: root/target-arm/cpu.h
Commit message (Collapse)AuthorAgeFilesLines
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-011-4/+0
| | | | | | | | Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
* Move CPU save/load registration to common code.pbrook2008-06-301-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
* Add instruction counter.pbrook2008-06-291-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix typo.pbrook2008-05-301-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
* Move clone() register setup to target specific code. Handle fork-like clone.pbrook2008-05-301-0/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
* Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard2008-05-291-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement ARM magic kernel page and TLS register.pbrook2008-05-291-0/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4610 c046a42c-6fe2-441c-8c8c-71466251a162
* moved halted field to CPU_COMMONbellard2008-05-281-1/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
* Add basic OMAP2 chip support.balrog2008-04-141-0/+1
| | | | | | | | | | Add the OMAP242x (arm1136 core) initialisation with basic on-chip peripherals and update OMAP1 peripherals which are re-used in OMAP2. Make palmte.c and sd.c errors go to stderr. Allow disabling SD chipselect. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4213 c046a42c-6fe2-441c-8c8c-71466251a162
* Move the excess of arm_load_kernel() parameters into a struct.balrog2008-04-141-6/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4212 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM N=Z=1 flag fix.pbrook2008-04-011-5/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4156 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 10/16.pbrook2008-03-311-3/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4147 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM TCG conversion 1/16.pbrook2008-03-311-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4138 c046a42c-6fe2-441c-8c8c-71466251a162
* Prevent cpsr_write/_read be put out of line in op.o (fixes a segfault on ↵balrog2007-11-131-42/+3
| | | | | | some platforms). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3633 c046a42c-6fe2-441c-8c8c-71466251a162
* ARMv7 support.pbrook2007-11-111-25/+162
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
* added cpu_model parameter to cpu_init()bellard2007-11-101-2/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-0/+11
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* Unify '-cpu ?' option.j_mayer2007-10-121-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
* Move get_sp_from_cpustate from cpu.h to target_signal.h.ths2007-09-271-5/+0
| | | | | | | Enable sigaltstack processing for more architectures. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
* linux-user sigaltstack() syscall, by Thayne Harbaugh.ths2007-09-271-0/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in ↵ths2007-09-171-3/+3
| | | | | | the regex. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-6/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
* Basic OMAP310 support. Basic Palm Tungsten|E machine emulation.balrog2007-07-291-1/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3091 c046a42c-6fe2-441c-8c8c-71466251a162
* Various reg offset shift typos.balrog2007-07-241-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3085 c046a42c-6fe2-441c-8c8c-71466251a162
* Reset ARM cp15.c1_sys to default values. Fix XScale cp15 accesses.balrog2007-06-241-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3013 c046a42c-6fe2-441c-8c8c-71466251a162
* Move target-specific defines to the target directories.ths2007-06-031-0/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM946 CPU support.pbrook2007-05-081-3/+9
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2783 c046a42c-6fe2-441c-8c8c-71466251a162
* Account for machine with RAM which is not mapped at 0x0 in arm_boot.c.balrog2007-04-301-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2757 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement iwMMXt instruction set for the PXA270 cpu.balrog2007-04-301-0/+19
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
* Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals.balrog2007-04-301-4/+34
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM reabbot support (orginal patch by Aurelien Jarno).pbrook2007-03-111-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix typo in help output.pbrook2007-03-081-0/+1
| | | | | | | List ARM cpus. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement --cpu for ARM.pbrook2007-03-081-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
* siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.ths2007-01-311-2/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2369 c046a42c-6fe2-441c-8c8c-71466251a162
* Check ELF binaries for machine type and endianness.ths2006-12-231-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2274 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix comment typo.pbrook2006-10-221-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2197 c046a42c-6fe2-441c-8c8c-71466251a162
* Add Arm926 core support.pbrook2006-02-201-3/+29
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1765 c046a42c-6fe2-441c-8c8c-71466251a162
* Arm Linux EABI syscall support.pbrook2006-02-091-0/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1756 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement Arm BKPT instruction.pbrook2006-02-041-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1740 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM CPU suspend/halt (Paul Brook)bellard2005-11-261-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1663 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM system emulation (Paul Brook)bellard2005-11-261-3/+97
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1661 c046a42c-6fe2-441c-8c8c-71466251a162
* added CPU_COMMON and CPUState.tb_jmp_cache[]bellard2005-11-201-15/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1630 c046a42c-6fe2-441c-8c8c-71466251a162
* gdb support for user mode (Paul Brook)bellard2005-04-171-0/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1367 c046a42c-6fe2-441c-8c8c-71466251a162
* VFP register ordering (Paul Brook)bellard2005-04-071-7/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1355 c046a42c-6fe2-441c-8c8c-71466251a162
* soft float supportbellard2005-03-131-5/+8
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1337 c046a42c-6fe2-441c-8c8c-71466251a162
* ARM VFP support (Paul Brook)bellard2005-02-221-0/+28
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1309 c046a42c-6fe2-441c-8c8c-71466251a162
* initial user mmu supportbellard2005-02-071-2/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1270 c046a42c-6fe2-441c-8c8c-71466251a162
* armv5te support (Paul Brook)bellard2005-01-311-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1258 c046a42c-6fe2-441c-8c8c-71466251a162
* monitor fixesbellard2004-10-091-2/+0
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1110 c046a42c-6fe2-441c-8c8c-71466251a162
* precise self modifying code supportbellard2004-04-251-0/+7
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@745 c046a42c-6fe2-441c-8c8c-71466251a162
OpenPOWER on IntegriCloud