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path: root/target-arm/cpu.c
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* target-arm: Override do_interrupt for ARMv7-M profileAndreas Färber2013-03-121-1/+13
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-0/+1
* cpu: Add CPUArchState pointer to CPUStateAndreas Färber2013-02-161-0/+2
* target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber2013-02-161-0/+6
* target-arm: Update ARMCPU to QOM realizefnAndreas Färber2013-02-161-7/+14
* target-arm: Rename CPU typesAndreas Färber2013-01-301-2/+6
* target-arm: Catch attempt to instantiate abstract type in cpu_init()Andreas Färber2013-01-271-1/+2
* target-arm: Detect attempt to instantiate non-CPU type in cpu_init()Andreas Färber2013-01-271-0/+17
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-1/+1
* target-arm: use type_register() instead of type_register_static()Eduardo Habkost2013-01-111-1/+1
* softmmu: move include files to include/sysemu/Paolo Bonzini2012-12-191-1/+1
* target-arm: Extend feature flags to 64 bitsPeter Maydell2012-07-121-1/+1
* target-arm: Implement privileged-execute-never (PXN)Peter Maydell2012-07-121-0/+4
* target-arm: Remove ARM_CPUID_* macrosPeter Maydell2012-06-201-25/+25
* target-arm: Convert final ID registersPeter Maydell2012-06-201-2/+0
* target-arm: Convert MPIDRPeter Maydell2012-06-201-0/+2
* target-arm: Convert cp15 cache ID registersPeter Maydell2012-06-201-2/+0
* target-arm: Convert cp15 crn=0 crm={1,2} feature registersPeter Maydell2012-06-201-14/+0
* target-arm: Convert cp15 crn=1 registersPeter Maydell2012-06-201-1/+6
* target-arm: Convert cp15 crn=9 registersPeter Maydell2012-06-201-0/+34
* target-arm: Convert cp15 crn=6 registersPeter Maydell2012-06-201-0/+10
* target-arm: convert cp15 crn=7 registersPeter Maydell2012-06-201-0/+19
* target-arm: Convert cp15 crn=15 registersPeter Maydell2012-06-201-2/+38
* target-arm: Convert cp15 crn=2 registersPeter Maydell2012-06-201-1/+0
* target-arm: Convert performance monitor registersPeter Maydell2012-06-201-4/+0
* target-arm: Add register_cp_regs_for_features()Peter Maydell2012-06-201-0/+2
* target-arm: initial coprocessor register frameworkPeter Maydell2012-06-201-0/+41
* target-arm: Fix 11MPCore cache type register valuePeter Maydell2012-06-201-1/+1
* target-arm: Move A9 config_base_address reset value to ARMCPUPeter Maydell2012-04-271-3/+1
* target-arm: Change cpu_arm_init() return type to ARMCPUAndreas Färber2012-04-271-1/+1
* target-arm: Move reset handling to arm_cpu_resetPeter Maydell2012-04-211-3/+91
* target-arm: Move cache ID register setup to cpu specific init fnsPeter Maydell2012-04-211-0/+11
* target-arm: Move feature register setup to per-CPU init fnsPeter Maydell2012-04-211-0/+94
* target-arm: Move SCTLR reset value setup to per cpu init fnsPeter Maydell2012-04-211-0/+23
* target-arm: Move CTR setup to per cpu init fnsPeter Maydell2012-04-211-0/+22
* target-arm: Move MVFR* setup to per cpu init fnsPeter Maydell2012-04-211-0/+14
* target-arm: Move FPSID config to cpu init fnsPeter Maydell2012-04-211-0/+9
* target-arm: Move feature bit settings to CPU init fnsPeter Maydell2012-04-211-0/+132
* target-arm: Add QOM subclasses for each ARM cpu implementationPeter Maydell2012-04-211-1/+225
* target-arm: Minimalistic CPU QOM'ificationAndreas Färber2012-03-291-0/+60
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