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* Revert "target-alpha: Add vector implementation for CMPBGE"Peter Maydell2015-05-221-37/+0
* target-alpha: Add vector implementation for CMPBGERichard Henderson2015-05-211-0/+37
* target-alpha: Rewrite helper_zapnotRichard Henderson2015-05-211-18/+12
* target-alpha: Raise IOV from CVTQLRichard Henderson2015-05-183-32/+13
* target-alpha: Suppress underflow from CVTTQ if DNZRichard Henderson2015-05-181-1/+1
* target-alpha: Raise EXC_M_INV properly for fp inputsRichard Henderson2015-05-183-10/+30
* target-alpha: Disallow literal operand to 1C.30 to 1C.37Richard Henderson2015-05-181-2/+17
* target-alpha: Implement WH64ENRichard Henderson2015-05-181-0/+4
* target-alpha: Fix integer overflow checking insnsRichard Henderson2015-05-183-70/+56
* target-alpha: Fix cvttq vs infRichard Henderson2015-05-181-1/+1
* target-alpha: Fix cvttq vs large integersRichard Henderson2015-05-181-5/+5
* target-alpha: Raise IOV from CVTTQRichard Henderson2015-05-183-30/+13
* target-alpha: Set EXC_M_SWC for exceptions from /S insnsRichard Henderson2015-05-181-5/+3
* target-alpha: Set fpcr_exc_status even for disabled exceptionsRichard Henderson2015-05-182-29/+34
* target-alpha: Tidy FPCR representationRichard Henderson2015-05-185-243/+159
* target-alpha: Set PC correctly for floating-point exceptionsRichard Henderson2015-05-182-1/+10
* target-alpha: Forget installed round mode after MT_FPCRRichard Henderson2015-05-181-0/+5
* target-alpha: Rename floating-point subroutinesRichard Henderson2015-05-183-36/+36
* target-alpha: Move VAX helpers to a new fileRichard Henderson2015-05-183-329/+354
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-2/+2
* cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost2015-03-101-8/+1
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-7/+7
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-4/+4
* target-alpha: Use cpu_exec_interrupt qom hookRichard Henderson2014-09-253-0/+46
* trace: [tcg] Include TCG-tracing header on all targetsLluĂ­s Vilanova2014-08-121-0/+3
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-052-3/+2
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-14/+0
* softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2014-06-052-1/+1
* softmmu: make do_unaligned_access a method of CPUPaolo Bonzini2014-06-053-4/+7
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-287-12/+7
* savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2014-05-141-2/+0
* target-alpha: Fix RDUSPRichard Henderson2014-05-021-1/+1
* target-alpha: Remove cpu_unique, cpu_sysval, cpu_uspRichard Henderson2014-04-171-19/+18
* target-alpha: Tidy alpha_translate_initRichard Henderson2014-04-171-35/+43
* target-alpha: Don't issue goto_tb under singlestepRichard Henderson2014-04-171-1/+2
* target-alpha: Use non-local temps for zero/sinkRichard Henderson2014-04-171-2/+2
* target-alpha: Use extract to get insn fieldsRichard Henderson2014-04-171-27/+22
* target-alpha: Convert mfpr/mtpr to source/sinkRichard Henderson2014-04-171-33/+19
* target-alpha: Convert gen_cpys et al to source/sinkRichard Henderson2014-04-171-76/+24
* target-alpha: Convert gen_fcvtlq/ql to source/sinkRichard Henderson2014-04-173-50/+36
* target-alpha: Convert gen_fcmov to source/sinkRichard Henderson2014-04-171-30/+14
* target-alpha: Convert gen_bcond to source/sinkRichard Henderson2014-04-171-18/+6
* target-alpha: Convert most ieee insns to source/sinkRichard Henderson2014-04-171-52/+17
* target-alpha: Convert gen_ieee_input to source/sinkRichard Henderson2014-04-171-19/+13
* target-alpha: Convert MVIOP2 to source/sinkRichard Henderson2014-04-171-19/+4
* target-alpha: Convert ARITH3 to source/sinkRichard Henderson2014-04-171-69/+39
* target-alpha: Convert FARITH3 to source/sinkRichard Henderson2014-04-171-53/+12
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