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* target-alpha: Initialize fpcrRichard Henderson2009-12-231-0/+2
| | | | | | | Linux, at least, disables exceptions by default. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Emit tcg debug_insn_start.Richard Henderson2009-12-211-0/+5
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement fp branch/cmov inline.Richard Henderson2009-12-171-87/+110
| | | | | | | | | | | The old fcmov implementation had a typo: - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); which moved the condition, not the second source, to the destination. But it's also easy to implement the simplified fp comparison inline. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix double log_cpu_state.Richard Henderson2009-12-131-1/+0
| | | | | | | The proper logging is handled by generic code. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix FMOV.Richard Henderson2009-12-131-3/+7
| | | | | | | Properly handle move from the zero register. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*h inline.Richard Henderson2009-12-131-6/+45
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*h inline.Richard Henderson2009-12-131-14/+49
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*l inline.Richard Henderson2009-12-131-8/+30
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*l inline.Richard Henderson2009-12-131-28/+59
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement RD/WRUNIQUE in the translatorRichard Henderson2009-12-131-10/+29
| | | | | | | | | When emulating user-mode only, there's no reason to exit the translation block to effect a call_pal. We can generate a move to/from the unique slot directly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix fbcond branch offset.Richard Henderson2009-12-131-5/+4
| | | | | | | | The instructions use a disp21 like all other branch insns, not the disp16 that was being passed. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Rewrite gen_ext_[hl] in terms of zapnot.Richard Henderson2009-12-131-32/+25
| | | | | | | | | The architecture manual specifies the EXT instructions in terms of the ZAPNOT operation; writing it that way in the translator makes things a bit clearer. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand zap/zapnot with immediate inline.Richard Henderson2009-12-131-2/+59
| | | | | | | | The vast majority of zap instructions have an immediate operand, since zapnot is the canonical method to zero-extend from u16 or u32. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fix -d in_asmRichard Henderson2009-12-131-15/+4
| | | | | | | | | | Generic disassembly was incorrectly keyed on ALPHA_DEBUG_DISAS rather than the generic DEBUG_DISAS. Use qemu_log_mask for additional LOG_DISAS output. Delete some random insn_count logging noise from gen_intermediate_code_internal. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement missing MVI instructions.Richard Henderson2009-12-131-30/+49
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Honor the -cpu command line argument.Richard Henderson2009-12-131-2/+42
| | | | | | | Also change the default cpu to ev67. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Remove bogus DO_TB_FLUSH code from translator.Richard Henderson2009-12-131-7/+1
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: fix extlh instructionVince Weaver2009-09-181-5/+6
| | | | | | | | | The extlh instruction on Alpha currently doesn't work properly. It's a combination of a cut/paste bug (16 where it should be 32) as well as a "shift by 64" bug. Signed-off-by: Vince Weaver <vince@csl.cornell.edu> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix sys-queue.h conflict for goodBlue Swirl2009-09-121-2/+2
| | | | | | | | | | | | | | | Problem: Our file sys-queue.h is a copy of the BSD file, but there are some additions and it's not entirely compatible. Because of that, there have been conflicts with system headers on BSD systems. Some hacks have been introduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896, f40d753718c72693c5f520f0d9899f6e50395e94, 96555a96d724016e13190b28cffa3bc929ac60dc and 3990d09adf4463eca200ad964cc55643c33feb50 but the fixes were fragile. Solution: Avoid the conflict entirely by renaming the functions and the file. Revert the previous hacks. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Replace always_inline with inlineBlue Swirl2009-08-161-47/+43
| | | | | | We define inline as always_inline. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* qemu: introduce qemu_init_vcpu (Marcelo Tosatti)aliguori2009-04-241-0/+1
| | | | | | | | Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix emulation of ecbaurel322009-04-151-6/+0
| | | | | | | | | | | As ECB is a hint, it can be safely emulated as a nop. This change is necessary to boot Tru64. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7111 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: remove amask helperaurel322009-04-101-2/+13
| | | | | | | | | | The direct use of helper_amask in translate.c was bogus (as env is not assigned). Directly code amask in tcg and remove the helper. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: remove helper_load_implveraurel322009-04-101-1/+3
| | | | | | | | | There is no need to use an helper. Directly load the value with tcg code. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix palcode mask for user pal callsaurel322009-04-071-1/+1
| | | | | | | | | (Also 6 bits for unprivileged calls) Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7033 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: stop translation if too longaurel322009-04-071-5/+9
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7027 c046a42c-6fe2-441c-8c8c-71466251a162
* Add new command line option -singlestep for tcg single stepping.aurel322009-04-051-4/+4
| | | | | | | | | | | | | | This replaces a compile time option for some targets and adds this feature to targets which did not have a compile time option. Add monitor command to enable or disable single step mode. Modify monitor command "info status" to display single step mode. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7004 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: bug fix: avoid nop to override next instructionaurel322009-03-291-3/+3
| | | | | | | | | | | While searching PC, always store the pc of a new instruction. Instructions that didn't generate tcg code (such as nop) prevented the next one to be referenced. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6930 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: add instruction name in comments for hw_ld opcode.aurel322009-03-291-20/+20
| | | | | | | | | | Make code slightly easier to read. Also unused hw_ld opcodes now generate an invalid opc fault. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6928 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix temp free for hw_staurel322009-03-291-2/+1
| | | | | | | | | No need to stop translation after hw_st. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6925 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix bug: integer conditional branch offset is 21 bits wide.aurel322009-03-291-10/+10
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6924 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: Fix bug: do not mask address LSBs for ldwu.aurel322009-03-291-1/+1
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6923 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: Fix bug: palcode is at least 6 bits.aurel322009-03-291-1/+1
| | | | | | | Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6922 c046a42c-6fe2-441c-8c8c-71466251a162
* targets: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
* global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)aliguori2009-01-151-1/+1
| | | | | | | | | | | | These are references to 'loglevel' that aren't on a simple 'if (loglevel & X) qemu_log()' statement. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert references to logfile/loglevel to use qemu_log*() macrosaliguori2009-01-151-10/+5
| | | | | | | | | | | | This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162
* Clean up debugging code #ifdefs (Eduardo Habkost)aliguori2009-01-151-13/+15
| | | | | | | | | | | | | | | Use macros to avoid #ifdefs on debugging code. This patch doesn't try to merge logging macros from different files, but just unify the debugging code #ifdefs onto a macro on each file. A further cleanup can unify the debugging macros on a common header, later Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6332 c046a42c-6fe2-441c-8c8c-71466251a162
* Update FSF address in GPL/LGPL boilerplateaurel322009-01-041-1/+1
| | | | | | | | | | The attached patch updates the FSF address in the GPL/LGPL boilerplate in most GPL/LGPLed files, and also in COPYING.LIB. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6162 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: gdb-stub supportaurel322008-12-071-1/+6
| | | | | | (Vince Weaver) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5945 c046a42c-6fe2-441c-8c8c-71466251a162
* Use sys-queue.h for break/watchpoint managment (Jan Kiszka)aliguori2008-11-251-2/+2
| | | | | | | | | | | | | This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the code and also fixing a use after release issue in cpu_break/watchpoint_remove_all. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
* Refactor and enhance break/watchpoint API (Jan Kiszka)aliguori2008-11-181-3/+4
| | | | | | | | | | | | | | | | | | | | | This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the succeeding enhancements this series comes with. First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching to dynamically allocated data structures that are kept in linked lists. This also allows to return a stable reference to the related objects, required for later introduced x86 debug register support. Breakpoints and watchpoints are stored with their full information set and an additional flag field that makes them easily extensible for use beyond pure guest debugging. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-171-309/+401
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix decoding of CVTST /Saurel322008-11-111-1/+1
| | | | | | | | | | | | This patch fixes the decoding of CVTST /S which was incorrectly being decoded as CVTTS. This fixes SPEC2000 gcc with 200.i input. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5693 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: disable single stepping and TB flush by defaultaurel322008-11-111-2/+2
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5690 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix double TCG variable allocationaurel322008-11-111-1/+1
| | | | | | | | Noticed by Chris Krumme. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5671 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix the return value of stl_c/stq_caurel322008-11-081-4/+4
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5649 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: fix locked loads/storesaurel322008-11-071-13/+21
| | | | | | | | | | | | | | | Fix reading of cpu_lock in gen_qemu_stql_c, original patch from Laurent Desnogues. A new flag was added to gen_store_mem to allocate local temps instead of temps; this flag should be set when the tcg_gen_qemu_store callback uses brcond before using the temps or else liveness analysis will get rid of the temps. This also adds lock printing in cpu_dump_state which can help debug. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5645 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: Fix ret instructionaurel322008-11-061-2/+2
| | | | | | | | | | | | | | | | | | Hopefully pine doesn't corrupt this patch, I've had problems recently. For an alpha "ret" instruction, of the type ret $26 The return was being ignored. This is because in translate.c register $26 (the return address) was being over-written with the current PC before it could be jumped to. Thus the ret was ignored. This patch just re-orders things so the return address is processed before it is over-written with the current PC. (Vince Weaver) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5638 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: use the new TCG logical operationsaurel322008-10-211-18/+6
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5502 c046a42c-6fe2-441c-8c8c-71466251a162
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