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path: root/target-alpha/translate.c
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* target-alpha: Raise IOV from CVTQLRichard Henderson2015-05-181-29/+5
* target-alpha: Raise EXC_M_INV properly for fp inputsRichard Henderson2015-05-181-0/+7
* target-alpha: Disallow literal operand to 1C.30 to 1C.37Richard Henderson2015-05-181-2/+17
* target-alpha: Implement WH64ENRichard Henderson2015-05-181-0/+4
* target-alpha: Fix integer overflow checking insnsRichard Henderson2015-05-181-7/+53
* target-alpha: Raise IOV from CVTTQRichard Henderson2015-05-181-13/+4
* target-alpha: Set fpcr_exc_status even for disabled exceptionsRichard Henderson2015-05-181-15/+13
* target-alpha: Tidy FPCR representationRichard Henderson2015-05-181-37/+8
* target-alpha: Forget installed round mode after MT_FPCRRichard Henderson2015-05-181-0/+5
* target-alpha: Rename floating-point subroutinesRichard Henderson2015-05-181-34/+34
* tcg: Change translator-side labels to a pointerRichard Henderson2015-03-131-2/+2
* tcg: Introduce tcg_op_buf_count and tcg_op_buf_fullRichard Henderson2015-02-121-7/+7
* tcg: Move emit of INDEX_op_end into gen_tb_endRichard Henderson2015-02-121-1/+1
* gen-icount: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-1/+1
* translate: check cflags instead of use_icount globalPaolo Bonzini2015-01-031-4/+4
* trace: [tcg] Include TCG-tracing header on all targetsLluís Vilanova2014-08-121-0/+3
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+1
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-281-3/+2
* target-alpha: Fix RDUSPRichard Henderson2014-05-021-1/+1
* target-alpha: Remove cpu_unique, cpu_sysval, cpu_uspRichard Henderson2014-04-171-19/+18
* target-alpha: Tidy alpha_translate_initRichard Henderson2014-04-171-35/+43
* target-alpha: Don't issue goto_tb under singlestepRichard Henderson2014-04-171-1/+2
* target-alpha: Use non-local temps for zero/sinkRichard Henderson2014-04-171-2/+2
* target-alpha: Use extract to get insn fieldsRichard Henderson2014-04-171-27/+22
* target-alpha: Convert mfpr/mtpr to source/sinkRichard Henderson2014-04-171-33/+19
* target-alpha: Convert gen_cpys et al to source/sinkRichard Henderson2014-04-171-76/+24
* target-alpha: Convert gen_fcvtlq/ql to source/sinkRichard Henderson2014-04-171-50/+28
* target-alpha: Convert gen_fcmov to source/sinkRichard Henderson2014-04-171-30/+14
* target-alpha: Convert gen_bcond to source/sinkRichard Henderson2014-04-171-18/+6
* target-alpha: Convert most ieee insns to source/sinkRichard Henderson2014-04-171-52/+17
* target-alpha: Convert gen_ieee_input to source/sinkRichard Henderson2014-04-171-19/+13
* target-alpha: Convert MVIOP2 to source/sinkRichard Henderson2014-04-171-19/+4
* target-alpha: Convert ARITH3 to source/sinkRichard Henderson2014-04-171-69/+39
* target-alpha: Convert FARITH3 to source/sinkRichard Henderson2014-04-171-53/+12
* target-alpha: Convert FARITH2 to source/sinkRichard Henderson2014-04-171-32/+11
* target-alpha: Convert gen_zap/not to source/sinkRichard Henderson2014-04-171-30/+11
* target-alpha: Convert gen_ins_h/l to source/sinkRichard Henderson2014-04-171-61/+50
* target-alpha: Convert gen_ext_h/l to source/sinkRichard Henderson2014-04-171-40/+26
* target-alpha: Convert gen_msk_h/l to source/sinkRichard Henderson2014-04-171-28/+19
* target-alpha: Convert gen_cmov to source/sinkRichard Henderson2014-04-171-44/+22
* target-alpha: Convert ARITH3_EX to source/sinkRichard Henderson2014-04-171-43/+6
* target-alpha: Convert gen_cmp to source/sinkRichard Henderson2014-04-171-35/+5
* target-alpha: Convert gen_store_conditional to source/sinkRichard Henderson2014-04-171-5/+1
* target-alpha: Convert gen_load/store_mem to source/sinkRichard Henderson2014-04-171-38/+29
* target-alpha: Convert opcode 0x1F to source/sinkRichard Henderson2014-04-171-20/+10
* target-alpha: Convert opcode 0x1E to source/sinkRichard Henderson2014-04-171-2/+4
* target-alpha: Convert opcode 0x1C to source/sinkRichard Henderson2014-04-171-54/+19
* target-alpha: Convert opcode 0x1B to source/sinkRichard Henderson2014-04-171-19/+13
* target-alpha: Convert opcode 0x1A to source/sinkRichard Henderson2014-04-171-5/+4
* target-alpha: Convert opcode 0x18 to source/sinkRichard Henderson2014-04-171-9/+9
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