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* target-alpha: Use mulu2 for umulh insnRichard Henderson2013-02-231-1/+0
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec: move include files to include/exec/Paolo Bonzini2012-12-191-2/+2
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* target-alpha: Use TCG_CALL_NO_WGRichard Henderson2012-10-311-10/+10
| | | | | | | Mark helper functions that raise exceptions, but otherwise do not change TCG register state, with TCG_CALL_NO_WG. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: rename helper flagsAurelien Jarno2012-10-281-88/+88
| | | | | | | | Rename helper flags to the new ones. This is purely a mechanical change, it's possible to use better flags by looking at the helpers. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Use noreturn marker in helper.h.Richard Henderson2012-03-241-1/+1
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Make use of fp_status.flush_inputs_to_zero.Richard Henderson2012-03-241-3/+2
| | | | | | | | | This softfp feature post-dates the last major update to the Alpha fpu translation. We can make use of this to eliminate at least one helper function that was performing this operation by hand. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move memory helpers to mem_helper.c.Richard Henderson2012-03-241-4/+4
| | | | | | | | This completes the transition away from AREG0. This patch must be last because it requires CONFIG_TCG_PASS_AREG0 set too. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move palcode support helpers to sys_helper.c.Richard Henderson2012-03-241-5/+5
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move integer overflow helpers to int_helper.c.Richard Henderson2012-03-241-6/+6
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move fpcr helpers from op_helper.c to helper.c.Richard Henderson2012-03-241-2/+2
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move floating-point helpers to fpu_helper.c.Richard Henderson2012-03-241-53/+53
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Move exception helpers to helper.c.Richard Henderson2012-03-241-1/+1
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Add high-resolution access to wall clock and an alarm.Richard Henderson2011-10-081-0/+4
| | | | | | | | | | | | | The alarm is a fully general one-shot time comparator, which will be usable under Linux as a hrtimer source. It's much more flexible than the RTC source available on real hardware. The wall clock allows the guest access to the host timekeeping. Much like the KVM wall clock source for other guests. Both are accessed via the PALcode Cserve entry point. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Implement HALT IPR.Richard Henderson2011-10-081-0/+1
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Implement TLB flush primitives.Richard Henderson2011-05-311-0/+3
| | | | | | Expose these via MTPR, more or less like the real HW does. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Rationalize internal processor registers.Richard Henderson2011-05-311-2/+0
| | | | | | | | | Delete all the code that tried to emulate the real IPRs of some unnamed CPU. Replace those with just 3 slots that we can use to communicate trap information between the helper functions that signal exceptions and the OS trap handler. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Merge HW_REI and HW_RET implementations.Richard Henderson2011-05-311-1/+0
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Fix translation of PALmode memory insns.Richard Henderson2011-05-311-17/+9
| | | | | | | | | | | | | | | | All of the "raw" memory accesses should be "phys" instead. Fix some confusion about argument ordering of the store routines. Fix the implementation of store-conditional. Delete the "alt-mode" helpers. Because we only implement two mmu modes, let /a imply user-mode unconditionally. Leave some combinations of virt access without permission checks as unimplemented. There are too many hoops through which to jump, and these insns will not be needed in the emulation palcode. Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-alpha: Implement cvtlq inline.Richard Henderson2010-04-271-1/+0
| | | | | | | It's a simple shift and mask sequence. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement rs/rc properly.Richard Henderson2010-04-271-2/+0
| | | | | | | | | | | This is a per-cpu flag; there's no need for a spinlock of any kind. We were also failing to manipulate the flag with $31 as a target reg and failing to clear the flag on execution of a return-from-interrupt instruction. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement cpys{, n, e} inline.Richard Henderson2010-04-271-4/+0
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement cvtql inline.Richard Henderson2010-04-101-4/+0
| | | | | | | | It's a simple mask and shift sequence. Also, fix a typo in the actual masks used. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Add flags markups to helpers.h.Richard Henderson2010-04-101-92/+92
| | | | | | | | Almost all alpha helpers are at least TCG_CALL_CONST and a fair few are also TCG_CALL_PURE. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement IEEE FP qualifiers.Richard Henderson2010-02-281-3/+18
| | | | | | | | | | | | | | | | IEEE FP instructions are split up so that the rounding mode coming from the instruction and exceptions (both masking and delivery) are handled external to the base FP operation. FP exceptions are properly raised for non-finite inputs to instructions that do not indicate software completion. A shortcut is applied if CONFIG_SOFTFLOAT_INLINE is defined at the top of translate.c: data is loaded and stored into FP_STATUS directly instead of using the functional interface defined by "softfloat.h". Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement fp branch/cmov inline.Richard Henderson2009-12-171-7/+0
| | | | | | | | | | | The old fcmov implementation had a typo: - tcg_gen_mov_i64(cpu_fir[rc], cpu_fir[ra]); which moved the condition, not the second source, to the destination. But it's also easy to implement the simplified fp comparison inline. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*h inline.Richard Henderson2009-12-131-3/+0
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*h inline.Richard Henderson2009-12-131-3/+0
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand msk*l inline.Richard Henderson2009-12-131-4/+0
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Expand ins*l inline.Richard Henderson2009-12-131-4/+0
| | | | | | | Similar in difficulty to ext*l, already expanded. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Implement missing MVI instructions.Richard Henderson2009-12-131-0/+14
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Remove bogus DO_TB_FLUSH code from translator.Richard Henderson2009-12-131-2/+0
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: remove amask helperaurel322009-04-101-1/+0
| | | | | | | | | | The direct use of helper_amask in translate.c was bogus (as env is not assigned). Directly code amask in tcg and remove the helper. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7075 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: remove helper_load_implveraurel322009-04-101-1/+0
| | | | | | | | | There is no need to use an helper. Directly load the value with tcg code. Signed-off-by: Tristan Gingold <gingold@adacore.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7074 c046a42c-6fe2-441c-8c8c-71466251a162
* TCG variable type checking.pbrook2008-11-171-130/+130
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: convert palcode ops to TCGaurel322008-09-301-0/+23
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5360 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: convert FP ops to TCGaurel322008-09-291-0/+67
| | | | | | | | | | | | | - Convert FP ops to TCG - Fix S format - Implement F and G formats (untested) - Fix MF_FPCR an MT_FPCR - Fix FTOIS, FTOIT, ITOFF, ITOFS, ITOFT - Fix CPYSN, CPYSE Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5354 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: convert remaining arith3 functions to TCGaurel322008-09-181-0/+9
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5254 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: switch a few helpers to TCGaurel322008-09-181-0/+5
| | | | | | | | Switch a few helpers to TCG and implement RC and RS instructions Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5247 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: convert byte manipulation instructions to TCGaurel322008-09-171-0/+18
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5246 c046a42c-6fe2-441c-8c8c-71466251a162
* target-alpha: convert arith2 instructions to TCGaurel322008-09-161-0/+6
| | | | | | | | | Replace gen_arith2 generic macro and dyngon ops by instruction specific optimized TCG code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5235 c046a42c-6fe2-441c-8c8c-71466251a162
* alpha: fix helper.haurel322008-09-141-5/+0
| | | | | | | | the content of target-alpha/helper.h is duplicated twice (Tristan Gingold) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5212 c046a42c-6fe2-441c-8c8c-71466251a162
* alpha: add target-alpha/helper.h (missing from commit r5150)aurel322008-09-041-0/+10
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5161 c046a42c-6fe2-441c-8c8c-71466251a162
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