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path: root/target-alpha/cpu.h
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* target-*: Drop cpu_gen_code defineRichard Henderson2015-10-071-1/+0
* alpha: Remove ELF_MACHINE from cpu.hPeter Crosthwaite2015-09-251-2/+0
* tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2015-09-111-1/+1
* target-alpha: Use separate TCGv temporaries for the shadow registersRichard Henderson2015-08-181-1/+2
* cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
* target-alpha: Tidy FPCR representationRichard Henderson2015-05-181-48/+47
* cpu: Make cpu_init() return QOM CPUState objectEduardo Habkost2015-03-101-8/+1
* exec.c: Drop TARGET_HAS_ICE define and checksPeter Maydell2015-01-201-2/+0
* softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini2014-06-051-0/+1
* cpu: Turn cpu_handle_mmu_fault() into a CPUClass hookAndreas Färber2014-03-131-3/+2
* cpu: Turn cpu_has_work() into a CPUClass hookAndreas Färber2014-03-131-15/+0
* cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()Andreas Färber2013-07-231-5/+0
* linux-user: Move cpu_clone_regs() and cpu_set_tls() into linux-userPeter Maydell2013-07-091-16/+0
* cpu: Turn cpu_unassigned_access() into a CPUState hookAndreas Färber2013-06-281-3/+3
* cpu: Replace do_interrupt() by CPUClass::do_interrupt methodAndreas Färber2013-03-121-1/+0
* cpu: Move halted and interrupt_request fields to CPUStateAndreas Färber2013-03-121-3/+1
* Merge branch 'master' of git://git.qemu.org/qemu into qom-cpuAndreas Färber2012-12-231-4/+4
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| * fpu: move public header file to include/fpuPaolo Bonzini2012-12-191-1/+1
| * exec: move include files to include/exec/Paolo Bonzini2012-12-191-3/+3
* | target-alpha: Add support for -cpu ?Andreas Färber2012-12-191-0/+2
* | target-alpha: Turn CPU definitions into subclassesAndreas Färber2012-12-191-0/+2
* | target-alpha: Avoid leaking the alarm timer over resetAndreas Färber2012-12-191-1/+0
* | target-alpha: Let cpu_alpha_init() return AlphaCPUAndreas Färber2012-12-191-2/+11
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* target-alpha: Remove t0, t1 from CPUAlphaStateRichard Henderson2012-12-071-7/+0
* cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-311-1/+3
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-1/+1
* alpha-linux-user: Work around hosted mmap allocation problemsRichard Henderson2012-08-041-2/+13
* target-alpha: QOM'ify CPUAndreas Färber2012-04-151-0/+1
* Use uintptr_t for various op related functionsBlue Swirl2012-04-141-3/+3
* Replace Qemu by QEMU in commentsStefan Weil2012-04-071-1/+1
* target-alpha: Make use of fp_status.flush_inputs_to_zero.Richard Henderson2012-03-241-1/+0
* target-alpha: Move exception helpers to helper.c.Richard Henderson2012-03-241-0/+3
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-1/+1
* target-alpha: Don't overuse CPUStateAndreas Färber2012-03-141-12/+12
* target-alpha: Clean includesStefan Weil2012-02-281-0/+1
* target-alpha: Add high-resolution access to wall clock and an alarm.Richard Henderson2011-10-081-0/+4
* Remove unused is_softmmu parameter from cpu_handle_mmu_faultBlue Swirl2011-08-071-1/+1
* Fix unassigned memory access handlingBlue Swirl2011-07-201-2/+3
* target-alpha, target-ppc: Remove unnecessary setjmp.h includePeter Maydell2011-07-121-2/+0
* Move cpu_has_work and cpu_pc_from_tb to cpu.hBlue Swirl2011-06-261-0/+22
* target-alpha: Trap for unassigned and unaligned addresses.Richard Henderson2011-05-311-1/+5
* target-alpha: Implement cpu_alpha_handle_mmu_fault for system mode.Richard Henderson2011-05-311-0/+13
* target-alpha: Disable interrupts properly.Richard Henderson2011-05-311-0/+5
* target-alpha: All ISA checks to use TB->FLAGS.Richard Henderson2011-05-311-2/+30
* target-alpha: Swap shadow registers moving to/from PALmode.Richard Henderson2011-05-311-0/+1
* target-alpha: Add IPRs to be used by the emulation PALcode.Richard Henderson2011-05-311-0/+15
* target-alpha: Use kernel mmu_idx for pal_mode.Richard Henderson2011-05-311-1/+7
* target-alpha: Add various symbolic constants.Richard Henderson2011-05-311-13/+43
* target-alpha: Tidy exception constants.Richard Henderson2011-05-311-20/+14
* target-alpha: Rationalize internal processor registers.Richard Henderson2011-05-311-134/+11
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