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* cpu defs: uncomment empty extfeatures_ecx definition for Opteron_G1 (v2)Eduardo Habkost2012-02-221-1/+1
| | | | | | | | | | | | | | | This should have no visible effect, but it should just clean up the config file a bit. This is based on a previous patch from John Cooper where this was introduced with many other changes at the same time. Original John's patch submission is at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>. Changes v1 -> v2: - Rebase against latest Qemu git tree Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* add Westmere as a qemu cpu model (v2)Eduardo Habkost2012-02-221-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Version 1 of this patch was: Message-Id: <1307041990-26194-11-git-send-email-ehabkost@redhat.com http://marc.info/?l=qemu-devel&m=130704415919346 This version doesn't have the duplicate feature bits on extfeature_edx, though, as they are being removed from the Intel models (as they are reserved bits on Intel CPUs). Version 1 patch description: This patch adds Westmere as a qemu cpu model. The only additional guest visible feature of a Westmere relative to Nehalem is the inclusion of AES instructions. However as other non-ABI visible modifications exist along with fabrication changes, the CPUID data of the corresponding deployed silicon was altered slightly to reflect this. We've seen isolated cases where apparently unrelated yet slightly incoherent CPUID data has caused problems, most notably during guest boot. Providing Westmere as a model separate fro Nehalem allows us to more easily address such quirks. [ehabkost: edited commit message to have a better Subject line] Signed-off-by: john cooper <john.cooper@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Changes version 1 -> version 2: - Remove the duplicate feature bits on extfeature_edx, that are reserved on Intel CPUs - Reorder feature flags - Remove x2apic from the definition because x2apic requires some fixes that have to be resubmitted Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* cpu defs: remove replicated flags from Intel (v2)Eduardo Habkost2012-02-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the replicated feature flags from cpuid 8000_0001:edx (extfeature_edx) from Intel models, as the duplicated feature flags are present only on AMD CPUs. On Intel models, only the i64, syscall, and xd flags are kept on extfeature_edx. This is based on a previous patch from John Cooper where this was introduced with many other changes at the same time. Original John's patch submission is at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>. Original John's patch description was: cpu model bug fixes and definition corrections This patch was intended to address the replicated feature flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx. This is due to AMD's definition where these flags are mostly cloned in the 8000_0001:edx cpuid function. qemu64 attempted to glue together the respective Intel and AMD nearly disjoint features and this propagated to the new Intel models as doing so was believed conservative at the time. However after further soak and test lugging around this cruft doesn't provide any value, could conceivably confuse a guest, and has confused users trying to maintain/add cpu definitions. This also caused issues for libvirt attempting to track this mis-encoding. So we've here tossed out the AMD replicated definitions from the Intel models, added a few replications into AMD definitions which were missing according to AMD's latest CPUID document, and reordered the config file flags to follow intuitive sequential bit ordering. Also two flag name aliases were added for clarity to Intel models. The end result being the models definitions now conform to their respective cpuid specifications sans x2apic which is emulated by kvm. This was tested with the following combinations: [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host Yielding successful boots in all cases. Signed-off-by: john cooper <john.cooper@redhat.com> Changes v1 -> v2: - Rebase against latest Qemu git tree Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* cpu defs: add pse36, mca, mtrr to AMD CPU definitions (v2)Eduardo Habkost2012-02-221-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds some missing flags to extfeature_edx, that were missing according to AMD's latest CPUID document. This is based on a previous patch from John Cooper where this was introduced with many other changes at the same time. Original John's patch submission is at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>. Original John's patch description was: cpu model bug fixes and definition corrections This patch was intended to address the replicated feature flags in cpuid 8000_0001:edx from cpuid 0000_0001:edx. This is due to AMD's definition where these flags are mostly cloned in the 8000_0001:edx cpuid function. qemu64 attempted to glue together the respective Intel and AMD nearly disjoint features and this propagated to the new Intel models as doing so was believed conservative at the time. However after further soak and test lugging around this cruft doesn't provide any value, could conceivably confuse a guest, and has confused users trying to maintain/add cpu definitions. This also caused issues for libvirt attempting to track this mis-encoding. So we've here tossed out the AMD replicated definitions from the Intel models, added a few replications into AMD definitions which were missing according to AMD's latest CPUID document, and reordered the config file flags to follow intuitive sequential bit ordering. Also two flag name aliases were added for clarity to Intel models. The end result being the models definitions now conform to their respective cpuid specifications sans x2apic which is emulated by kvm. This was tested with the following combinations: [Conroe, Penryn, Nehalem] x [F12-64, win64, win32] -- Intel host [Opteron_G1, Opteron_G2, Opteron_G3] x [F12-64, win64, win32] -- AMD host Yielding successful boots in all cases. Signed-off-by: john cooper <john.cooper@redhat.com> Changes v1 -> v2: - Rebase against latest Qemu git tree Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* cpu defs: use Intel flag names for Intel models (v2)Eduardo Habkost2012-02-221-3/+3
| | | | | | | | | | | | | | | | Use 'i64' instead of 'lm' and 'xd' instead of 'nx' on Intel models. The flags have different names on Intel docs, so use those names for clarity. This is based on a previous patch from John Cooper where this was introduced with many other changes at the same time. Original John's patch submission is at Message-ID: <4DDAD5E7.2020002@redhat.com>, <http://marc.info/?l=qemu-devel&m=130618871926030>. Changes v1 -> v2: - Rebase patch against latest Qemu git tree Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* cpu models: reorder flag list to match bit orderEduardo Habkost2012-02-221-18/+18
| | | | | | | | | | | | | | | This will make it easier to review and change the flag list in the future. No behaviour change should be introduced by this, as it is just changing the flag order on the config file. To make sure the flag sets are really not changed by this patch, I have used the following stupid script to compare the flag values in the config files: https://gist.github.com/1004885 Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Add cpu model configuration support..john cooper2010-02-221-0/+86
This is a reimplementation of prior versions which adds the ability to define cpu models for contemporary processors. The added models are likewise selected via -cpu <name>, and are intended to displace the existing convention of "-cpu qemu64" augmented with a series of feature flags. A primary motivation was determination of a least common denominator within a given processor class to simplify guest migration. It is still possible to modify an arbitrary model via additional feature flags however the goal here was to make doing so unnecessary in typical usage. The other consideration was providing models names reflective of current processors. Both AMD and Intel have reviewed the models in terms of balancing generality of migration vs. excessive feature downgrade relative to released silicon. This version of the patch replaces the prior hard wired definitions with a configuration file approach for new models. Existing models are thus far left as-is but may easily be transitioned to (or may be overridden by) the configuration file representation. Proposed new model definitions are provided here for current AMD and Intel processors. Each model consists of a name used to select it on the command line (-cpu <name>), and a model_id which corresponds to a least common denominator commercial instance of the processor class. A table of names/model_ids may be queried via "-cpu ?model": : x86 Opteron_G3 AMD Opteron 23xx (Gen 3 Class Opteron) x86 Opteron_G2 AMD Opteron 22xx (Gen 2 Class Opteron) x86 Opteron_G1 AMD Opteron 240 (Gen 1 Class Opteron) x86 Nehalem Intel Core i7 9xx (Nehalem Class Core i7) x86 Penryn Intel Core 2 Duo P9xxx (Penryn Class Core 2) x86 Conroe Intel Celeron_4x0 (Conroe/Merom Class Core 2) : Also added is "-cpu ?dump" which exhaustively outputs all config data for all defined models, and "-cpu ?cpuid" which enumerates all qemu recognized CPUID feature flags. The pseudo cpuid flag 'check' when added to the feature flag list will warn when feature flags (either implicit in a cpu model or explicit on the command line) would have otherwise been quietly unavailable to a guest: # qemu-system-x86_64 ... -cpu Nehalem,check warning: host cpuid 0000_0001 lacks requested flag 'sse4.2|sse4_2' [0x00100000] warning: host cpuid 0000_0001 lacks requested flag 'popcnt' [0x00800000] A similar 'enforce' pseudo flag exists which in addition to the above causes qemu to error exit if requested flags are unavailable. Configuration data for a cpu model resides in the target config file which by default will be installed as: /usr/local/etc/qemu/target-<arch>.conf The format of this file should be self explanatory given the definitions for the above six models and essentially mimics the structure of the static x86_def_t x86_defs. Encoding of cpuid flags names now allows aliases for both the configuration file and the command line which reconciles some Intel/AMD/Linux/Qemu naming differences. This patch was tested relative to qemu.git. Signed-off-by: john cooper <john.cooper@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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