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* linux-user/elfload.c: Don't use _raw accessor functionsPeter Maydell2015-01-201-2/+5
| | | | | | | | | | | The _raw accessor functions are an implementation detail that has leaked out to some callsites. Use get_user_u64() instead of ldq_raw(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-5-git-send-email-peter.maydell@linaro.org
* linux-user: Do not subtract offset from end addressTom Musta2014-11-111-1/+1
| | | | | | | | | When computing the upper address of a program segment, do not subtract the offset from the virtual address; instead compute the sum of the virtual address and the memory size. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* elf: take phdr offset into account when calculating the program load addressJonas Maebe2014-11-031-1/+1
| | | | | | | | The first program header does not necessarily start at offset 0. This change corresponds to what the Linux kernel does in load_elf_binary(). Signed-off-by: Jonas Maebe <jonas.maebe@elis.ugent.be> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Let user specify random seedMagnus Reftel2014-11-031-1/+0
| | | | | | | | | | This patch introduces the -seed command line option and the QEMU_RAND_SEED environment variable for setting the random seed, which is used for the AT_RANDOM ELF aux entry. Signed-off-by: Magnus Reftel <reftel@spotify.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* translate-all.c: memory walker initial address miscalculationMikhail Ilyin2014-10-061-9/+9
| | | | | | | | | | | | The initial base address is miscalculated in walk_memory_regions(). It has to be shifted TARGET_PAGE_BITS more. Holder variables are extended to target_ulong size otherwise they don't fit for MIPS N32 (a 32-bit ABI with a 64-bit address space) and qemu won't compile. The issue led to incorrect debug output of memory maps and a mis-formed coredumped file. Signed-off-by: Mikhail Ilyin <m.ilin@samsung.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Move get_ppc64_abiTom Musta2014-08-221-9/+0
| | | | | | | | | | The get_ppc64_abi is used to determine the ELF ABI (i.e. V1 or V2). This routine is currently implemented in the linux-user/elfload.c file but is useful in other scenarios. Move the routine to a more generally available location (linux-user/ppc/target_cpu.h). Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Support HWCAP2 in PowerPCTom Musta2014-06-271-0/+31
| | | | | | | | Set bits in the AT_HWCAP2 entry of the AUXV. Specifically, detect and set bits for bctar, ISEL and ISA 2.07. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* linux-user: Identify Addition Hardware Capabilities for PowerPCTom Musta2014-06-271-0/+8
| | | | | | | | Add VSX, DFP and ISA 2.06 to the bits identified in the AT_HWCAP entry of the AUXV. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* linux-user: Correct AUXV Cache Line Sizes for PowerPCTom Musta2014-06-271-2/+3
| | | | | | | | | | | Set the AT_ICACHEBSIZE and AT_DCACHEBSIZE entries of the AUXV to match the CPU model's cache line sizes. This fixes memory clobbering problems on more recent Book 3s implementations; memset(p, 0, N) will use the dcbz instruction when N is sufficiently large and many of the newer server CPUs have cache lines sizes of 128 bytes. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* User mode support for Linux ELF files with no section headerCraig Heffner2014-06-171-1/+0
| | | | | | | | | | | In user mode Linux, Qemu currently refuses to load ELF files that do not contain section headers (ehdr->e_shentsize == 0). Since section headers are not required in order to load an ELF file, simply removing the e_shentsize check in elf_check_ehdr() allows ELF binaries with no section headers to be run properly in user mode: Signed-off-by: Craig Heffner <cheffner@tacnetsol.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Tell guest about big host page sizesAlexander Graf2014-06-161-1/+1
| | | | | | | | | | | | | | | | | | We tell the guest its page size via AUX vectors. The guest process then uses this page size as information on which boundaries it can mmap() things. However, if the host has a bigger page size granularity than the guest, it can not fulfill these mmap() requests - which falls apart when MAP_FIXED is passed to mmap. So in that case, let the guest know that we're running on a bigger page size granularity than the target would require. This fixes running qemu-ppc (TARGET_PAGE_SIZE=4k) on a 64k page size ppc64 host for me. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
* target-ppc: Confirm That .bss Pages Are ValidTom Musta2014-06-161-3/+4
| | | | | | | | | | | | | | The existing code does a check to ensure that a .bss region is properly mmap'd. When additional mmap is required, the (guest) pages are also validated. However, this code has a bug: when host page size is larger than target page size, it is possible for the .bss pages to already be (host) mapped but the guest .bss pages may not be valid. The check to mmap additional space is separated from the flagging of the target (guest) pages, thus ensuring that both aspects are done properly. Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-ppc: Support little-endian PPC64 in user mode.Doug Kwan2014-06-161-2/+15
| | | | | | | | | | Look at ELF header to determine ABI version on PPC64. This is required for executing the first instruction correctly. Also print correct machine name in uname() system call. Signed-off-by: Doug Kwan <dougkwan@google.com> Signed-off-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-arm: A64: Implement two-register SHA instructionsPeter Maydell2014-06-091-0/+2
| | | | | | | | Implement the two-register SHA instruction group from the optional Crypto Extensions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-10-git-send-email-peter.maydell@linaro.org
* target-arm: A64: Implement AES instructionsPeter Maydell2014-06-091-0/+1
| | | | | | | Implement the AES instructions from the optional Crypto Extensions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-8-git-send-email-peter.maydell@linaro.org
* target-arm: A64: Implement CRC instructionsPeter Maydell2014-06-091-0/+1
| | | | | | | Implement the optional A64 CRC instructions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-6-git-send-email-peter.maydell@linaro.org
* target-arm: A64: Use PMULL feature bit for PMULLPeter Maydell2014-06-091-1/+1
| | | | | | | Now that we have a separate ARM_FEATURE_V8_PMULL bit, use it for the A64 PMULL, not the AES feature bit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target-arm: add support for v8 VMULL.P64 instructionPeter Maydell2014-06-091-0/+1
| | | | | | | | | | | | | | Add support for the VMULL.P64 polynomial 64x64 to 128 bit multiplication instruction in the A32/T32 instruction sets; this is part of the v8 Crypto Extensions. To do this we have to move the neon_pmull_64_{lo,hi} helpers from helper-a64.c into neon_helper.c so they can be used by the AArch32 translator. Inspired-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-4-git-send-email-peter.maydell@linaro.org
* target-arm: add support for v8 SHA1 and SHA256 instructionsArd Biesheuvel2014-06-091-0/+2
| | | | | | | | | | | | | | | | | | This adds support for the SHA1 and SHA256 instructions that are available on some v8 implementations of Aarch32. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-2-git-send-email-peter.maydell@linaro.org [PMM: * rebase * fix bad indent * add a missing UNDEF check for Q!=1 in the 3-reg SHA1/SHA256 case * use g_assert_not_reached() * don't re-extract bit 6 for the 2-reg-misc encodings * set the ELF HWCAP2 bits for the new features ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user/elfload.c: Support ARM HWCAP2 flagsPeter Maydell2014-05-021-1/+29
| | | | | | | | | The ARM kernel has chosen to spill into the HWCAP2 ELF feature bit flags early, even though it hasn't yet exhausted all 32 bits of the HWCAP word. Add support for setting this in the same way we do for HWCAP. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user/elfload.c: Fix A64 code which was incorrectly acting like A32Peter Maydell2014-05-021-13/+73
| | | | | | | | | | | | | The ARM target-specific code in elfload.c was incorrectly allowing the 64-bit ARM target to use most of the existing 32-bit definitions: most noticably this meant that our HWCAP bits passed to the guest were wrong, and register handling when dumping core was totally broken. Fix this by properly separating the 64 and 32 bit code, since they have more differences than similarities. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user/elfload.c: Update ARM HWCAP bitsPeter Maydell2014-05-021-2/+20
| | | | | | | | | | | | | | | | | | The kernel has added support for a number of new ARM HWCAP bits; add them to QEMU, including support for setting them where we have a corresponding CPU feature bit. We were also incorrectly setting the VFPv3D16 HWCAP -- this means "only 16 D registers", not "supports 16-bit floating point format"; since QEMU always has 32 D registers for VFPv3, we can just remove the line that incorrectly set this bit. The kernel does not set the HWCAP_FPA even if it is providing FPA emulation via nwfpe, so don't set this bit in QEMU either. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user/elfload.c: Fix incorrect ARM HWCAP bitsPeter Maydell2014-05-021-4/+5
| | | | | | | | | | | | The ELF HWCAP bits for ARM features THUMBEE, NEON, VFPv3 and VFPv3D16 are all off by one compared to the kernel definitions. Fix this discrepancy and add in the missing CRUNCH bit which was the cause of the off-by-one error. (We don't emulate any of the CPUs which have that weird hardware, so it's otherwise uninteresting to us.) Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Assert stack used for auxvec, envp, argvJames Hogan2014-05-021-0/+2
| | | | | | | | | | | Assert that the amount of stack space used for auxvec, envp & argv exactly matches the amount allocated. This catches if DLINFO_ITEMS isn't updated when another NEW_AUX_ENT is added. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Correct DLINFO_ITEMSJames Hogan2014-03-261-1/+1
| | | | | | | | | | | | | | | Commit a07c67dfccb1 (Implement AT_CLKTCK.) back in March 2008 added a new auxvec entry but didn't increment DLINFO_ITEMS, so it's been out of sync ever since. Bump it up to 14 so that it matches the number of NEW_AUX_ENT's that need to be counted in create_elf_tables(). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Paul Brook <paul@codesourcery.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Don't reserve space for commpage for AArch64Peter Maydell2014-03-171-1/+4
| | | | | | | | | | AArch64 Linux, unlike AArch32, doesn't use a commpage. This means we should not be reserving room in the guest address space for one. Fixes LP:1287195. Reported-by: Amanieu d'Antras <amanieu@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* cpu: Move opaque field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-4/+6
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* linux-user/elfload.c: Avoid calling g_free() on uninitialized dataPeter Maydell2014-02-181-4/+12
| | | | | | | | | | | Avoid calling g_free() on unintialized data in the error-handling paths in elf_core_dump() by splitting the initialization of the elf_note_info struct out of fill_note_info() so that it's always valid to call free_note_info() whether we got to the point of being able to fill_note_info() or not. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Remove regs parameter of load_elf_binary and load_flt_binaryWill Newton2014-01-101-2/+1
| | | | | | | | | The regs parameter is not used anywhere, so remove it. Signed-off-by: Will Newton <will.newton@linaro.org> Reviewed-by: Erik de Castro Lopo <erikd@mega-nerd.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* linux-user: Add AArch64 supportAlexander Graf2013-09-101-2/+13
| | | | | | | | | | | | | | | | | | This patch adds support for AArch64 in all the small corners of linux-user (primarily in image loading and startup code). Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: John Rigby <john.rigby@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-22-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org [PMM: * removed some unnecessary #defines from syscall.h * catch attempts to use a 32 bit only cpu with aarch64-linux-user * termios stuff moved into its own patch * we specify our minimum uname version here now ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* cpu: Use QTAILQ for CPU listAndreas Färber2013-09-031-1/+1
| | | | | | | Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
* linux-user: Change thread_env to CPUStateAndreas Färber2013-07-091-7/+9
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Make first_cpu and next_cpu CPUStateAndreas Färber2013-07-091-3/+4
| | | | | | | | | | | | Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-i386: Replace cpuid_*features fields with a feature word arrayEduardo Habkost2013-05-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* elfload: use abi_llong/ullong instead of target_llong/ullongPaolo Bonzini2013-04-181-2/+2
| | | | | | | The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elfload: use abi_int/uint instead of target_int/uintPaolo Bonzini2013-04-181-7/+7
| | | | | | | The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elfload: use abi_short/ushort instead of target_short/ushortPaolo Bonzini2013-04-181-3/+3
| | | | | | | The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elfload: use tswapreg consistently in elf_core_copy_regsPaolo Bonzini2013-04-181-57/+57
| | | | | | Reviewed-by: Peter Maydell <peter.maydell@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elfload: fix size of registers for N32Paolo Bonzini2013-04-181-7/+14
| | | | | | | | | | Registers are 64-bit in size for the MIPS n32 ABI. Define target_elf_greg_t accordingly, and use the correct function to do endian swaps. Reviewed-by: Peter Maydell <peter.maydell@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* elfload: fix size of ABI-dependent fields in core dumpsPaolo Bonzini2013-04-181-9/+9
| | | | | | | | | | | Some fields in core dumps are 32-bit in 32-or-64 environments (ppc64abi32, sparc32plus). Use abi_long/ulong for those. Also, the fields of target_elf_siginfo are ints. Use tswap32 to convert them. Reviewed-by: Peter Maydell <peter.maydell@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* linux-user: remove two unchecked uses of strdupJim Meyering2012-10-051-5/+7
| | | | | | | | | Remove two uses of strdup (use g_path_get_basename instead), and add a comment that this strncpy use is ok. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jim Meyering <meyering@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* linux-user: Use init_guest_space when -R and -B are specifiedMeador Inge2012-08-141-9/+50
| | | | | | | | | | | | | Roll the code used to initialize the guest memory space when -R or -B is used into 'init_guest_space' and then call 'init_guest_space' from the driver. This way the reserved guest memory space can be probed for. Calling 'mmap' just once as is currently done is not guaranteed to succeed since the host address space validation might fail. Signed-off-by: Meador Inge <meadori@codesourcery.com> [PMM: Fixed minor whitespace errors.] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* linux-user: Factor out guest space probing into a functionMeador Inge2012-08-141-33/+77
| | | | | | Signed-off-by: Meador Inge <meadori@codesourcery.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* target-or32: Add linux user supportJia Liu2012-07-271-0/+41
| | | | | | | Add QEMU OpenRISC linux user support. Signed-off-by: Jia Liu <proljc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Userspace ARM BE8 supportPaul Brook2012-04-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support for ARM BE8 userspace binaries. i.e. big-endian data and little-endian code. In principle LE8 mode is also possible, but AFAIK has never actually been implemented/used. System emulation doesn't have any useable big-endian board models, but should in principle work once you fix that. Dynamic endianness switching requires messing with data accesses, preferably with TCG cooperation, and is orthogonal to BE8 support. Signed-off-by: Paul Brook <paul@codesourcery.com> [PMM: various changes, mostly as per my suggestions in code review: * rebase * use EF_ defines rather than hardcoded constants * make bswap_code a bool for future VMSTATE macro compatibility * update comment in cpu.h about TB flags bit field usage * factor out load-code-and-swap into arm_ld*_code functions and get_user_code* macros * fix stray trailing space at end of line * added braces in disas.c to satisfy checkpatch ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* arm-linux-user: fix elfload.c's AT_HWCAP to reflect cpu features.Benoit Canet2012-04-061-4/+27
| | | | | | | | | | | | | | The cpu capabilities passed by the elf loader in AT_HWCAP where a constant. Make AT_HWCAP reflect the emulated cpu features in order to give correct clues to eglibc. Riku Voipio: fixed to apply to current head Fix : [Bug 887516] [NEW] VFP support reported for the PXA270 Signed-off-by: Benoit Canet <benoit.canet@gmail.com> Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
* Rename CPUState -> CPUArchStateAndreas Färber2012-03-141-8/+8
| | | | | | | | | | | | | Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
* linux-user: Don't overuse CPUStateAndreas Färber2012-03-141-12/+12
| | | | | | | | In target-specific code use CPU*State. While at it, fix indentation on those lines. Signed-off-by: Andreas Färber <afaerber@suse.de>
* linux-user: save auxv lengthAlexander Graf2012-02-021-11/+4
| | | | | | | | | | | | | | We create our own AUXV segment on stack and save a pointer to it. However we don't save the length of it, so any code that wants to do anything useful with it later on has to walk it again. Instead, let's remember the length of our AUXV segment. This simplifies later uses by a lot. (edited by Riku to apply to qemu HEAD) Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
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