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* hw/pci: add support for NUMA nodesMarcel Apfelbaum2015-06-032-0/+2
| | | | | | | | | | PCI root buses can be attached to a specific NUMA node. PCI buses are not attached by default to a NUMA node. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* hw/pci: introduce PCI Expander Bridge (PXB)Marcel Apfelbaum2015-06-031-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PXB is a "light-weight" host bridge whose purpose is to enable the main host bridge to support multiple PCI root buses for pc machines. As oposed to PCI-2-PCI bridge's secondary bus, PXB's bus is a primary bus and can be associated with a NUMA node (different from the main host bridge) allowing the guest OS to recognize the proximity of a pass-through device to other resources as RAM and CPUs. The PXB is composed from: - A primary PCI bus (can be associated with a NUMA node) Acts like a normal pci bus and from the functionality point of view is an "expansion" of the bus behind the main host bridge. - A pci-2-pci bridge behind the primary PCI bus where the actual devices will be attached. - A host-bridge PCI device Situated on the bus behind the main host bridge, allows the BIOS to configure the bus number and IO/mem resources. It does not have its own config/data register for configuration cycles, this being handled by the main host bridge. - A host-bridge sysbus to comply with QEMU current design. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* hw/pci: made pci_bus_num a PCIBusClass methodMarcel Apfelbaum2015-06-031-0/+1
| | | | | | | | | | Refactoring it as a method of PCIBusClass will allow different implementations for subclasses. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* hw/pci: made pci_bus_is_root a PCIBusClass methodMarcel Apfelbaum2015-06-032-0/+10
| | | | | | | | | | | | | | Refactoring it as a method of PCIBusClass will allow different implementations for subclasses. Removed the assumption that the root bus does not have a parent device because is specific only to the default class implementation. Signed-off-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Laszlo Ersek <lersek@redhat.com>
* Add stream ID to MSI writePavel Fedin2015-05-311-0/+1
| | | | | | | | | | | | | | | | | GICv3 ITS distinguishes between devices by using hardwired device IDs passed on the bus. This patch implements passing these IDs in qemu. SMMU is also known to use stream IDs, therefore this addition can also be useful for implementing platforms with SMMU. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Changes from v1: - Added bus number to the stream ID - Added stream ID not only to MSI-X, but also to plain MSI. Some common code was made into msi_send_message() function. Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: add network device class 'other' for network switchesScott Feldman2015-05-111-0/+1
| | | | | | | | | | Rocker is an ethernet switch device, so add 'other' network device class as defined by PCI to cover these types of devices. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Jiri Pirko <jiri@resnulli.us> Message-id: 1426306173-24884-6-git-send-email-sfeldma@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* pci: add rocker device IDScott Feldman2015-05-111-0/+1
| | | | | | | Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Jiri Pirko <jiri@resnulli.us> Message-id: 1426306173-24884-5-git-send-email-sfeldma@gmail.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Convert (ffs(val) - 1) to ctz32(val)Stefan Hajnoczi2015-04-282-17/+17
| | | | | | | | | | | | | | | | | | | This commit was generated mechanically by coccinelle from the following semantic patch: @@ expression val; @@ - (ffs(val) - 1) + ctz32(val) The call sites have been audited to ensure the ffs(0) - 1 == -1 case never occurs (due to input validation, asserts, etc). Therefore we don't need to worry about the fact that ctz32(0) == 32. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1427124571-28598-5-git-send-email-stefanha@redhat.com Signed-off-by: Kevin Wolf <kwolf@redhat.com>
* pci: fix several trivial typos in commentChen Fan2015-03-182-2/+2
| | | | | | Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pcie: correct mistaken register bit for End-End TLP Prefix BlockingChen Fan2015-03-181-1/+1
| | | | | | | | | from pcie spec 7.8.17, the End-End TLP Prefix Blocking bit local is 15(e.g. 0x8000) in device control 2 register. Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: Give a few helpers internal linkageMarkus Armbruster2015-03-011-7/+0
| | | | | | | | | None of them should be used in new code. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: Permit incremental conversion of device models to realizeMarkus Armbruster2015-02-261-1/+2
| | | | | | | | | | | | | | | Call the new PCIDeviceClass method realize(). Default it to pci_default_realize(), which calls old method init(). To convert a device model, make it implement realize() rather than init(). Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2015-02-241-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - vhost-scsi: add bootindex property - RCU: fix MemoryRegion lifetime issues in PCI; document the rules; convert of AddressSpaceDispatch and RAMList - KVM: add kvm_exit reasons for aarch64 # gpg: Signature made Mon Feb 16 16:32:32 2015 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (21 commits) Convert ram_list to RCU exec: convert ram_list to QLIST cosmetic changes preparing for the following patches exec: protect mru_block with RCU rcu: add g_free_rcu rcu: introduce RCU-enabled QLIST exec: RCUify AddressSpaceDispatch exec: make iotlb RCU-friendly exec: introduce cpu_reload_memory_map docs: clarify memory region lifecycle pci: split shpc_cleanup and shpc_free pcie: remove mmconfig memory leak and wrap mmconfig update with transaction memory: keep the owner of the AddressSpace alive until do_address_space_destroy rcu: run RCU callbacks under the BQL rcu: do not let RCU callbacks pile up indefinitely vhost-scsi: set the bootable value of channel/target/lun vhost-scsi: add a property for booting vhost-scsi: expose the TYPE_FW_PATH_PROVIDER interface vhost-scsi: add bootindex property qdev: support to get a device firmware path directly ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * pci: split shpc_cleanup and shpc_freePaolo Bonzini2015-02-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | object_unparent should not be called until the parent device is going to be destroyed. Only remove the capability and do memory_region_del_subregion at unrealize time. Freeing the data structures is left in shpc_free, to be called from the instance_finalize callback. Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Matthew Rosato <mjrosato@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | pci: Allocate PCIe host bridge PCI IDAlexander Graf2015-02-131-0/+1
|/ | | | | | | | | | | | We are going to introduce a PCIe host controller that doesn't exist that way in real hardware, but still needs to expose some PCIe root device which has PCI IDs. Allocate a PCI ID in the Red Hat space that we use for other devices of this kind. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* pci: Split pcie_host_mmcfg_map()Alexander Graf2015-01-261-0/+1
| | | | | | | | | | | | | | | The mmcfg space is a memory region that allows access to PCI config space in the PCIe world. To maintain abstraction layers, I would like to expose the mmcfg space as a sysbus mmio region rather than have it mapped straight into the system's memory address space though. So this patch splits the initialization of the mmcfg space from the actual mapping, allowing us to only have an mmfg memory region without the map. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
* pci: move REDHAT_SDHCI device ID to make room for RockerScott Feldman2015-01-031-1/+1
| | | | | | | | | | | The rocker device uses same PCI device ID as sdhci. Since rocker device driver has already been accepted into Linux 3.18, and REDHAT_SDHCI device ID isn't used by any drivers, it's safe to move REDHAT_SDHCI device ID, avoiding conflict with rocker. Signed-off-by: Scott Feldman <sfeldma@gmail.com> Signed-off-by: Jiri Pirko <jiri@resnulli.us> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* sdhci: Define SDHCI PCI idsKevin O'Connor2014-12-152-0/+2
| | | | | Signed-off-by: Kevin O'Connor <kevin@koconnor.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* megasas: add MegaRAID SAS 2108 emulationHannes Reinecke2014-10-311-0/+1
| | | | | | | | | The 2108 chip supports MSI and MSI-X, so update the emulation to support both chips. Signed-off-by: Hannes Reinecke <hare@suse.de> [Make VMStateDescription const. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* qdev: HotplugHandler: Rename unplug callback to unplug_requestIgor Mammedov2014-10-152-4/+4
| | | | | | | | | | | | | 'HotplugHandler.unplug' callback is currently used as async call to issue unplug request for device that implements it. Renaming 'unplug' callback to 'unplug_request' should help to avoid confusion about what callback does and would allow to introduce 'unplug' callback that would perform actual device removal when guest is ready for it. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* pcie: Rename the pcie_cap_ari_* functions to pcie_cap_arifwd_*Knut Omang2014-08-251-3/+4
| | | | | | | | | | Rename helper functions to make a clearer distinction between the PCIe capability/control register feature ARI forwarding and a device that supports the ARI feature via an ARI extended PCIe capability. Signed-off-by: Knut Omang <knut.omang@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/pcie: implement power controller functionalityMarcel Apfelbaum2014-06-233-0/+7
| | | | | | | | | It is needed by hot-unplug in order to get an indication from the OS when the device can be physically detached. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pcie_host: Turn pcie_host_init() into an instance_initAndreas Färber2014-05-211-1/+0
| | | | | | | | | This assures the trivial field initialization is applied for any derived type - currently only Q35PCIHost. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: add Error-propagating pci_add_capability2()Laszlo Ersek2014-05-081-0/+4
| | | | | | | | ... and rebase pci_add_capability() to it. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
* hw/pci: switch to a generic hotplug handling for PCIDeviceIgor Mammedov2014-02-102-12/+0
| | | | | | | | | | | | | make qdev_unplug()/device_set_realized() to call hotplug handler's plug/unplug methods if available and remove not needed anymore hot(un)plug handling from PCIDevice. In case if hotplug handler is not available, revert to the legacy hotplug method for compatibility with not yet converted buses. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci/pcie: convert PCIE hotplug to use hotplug-handler APIIgor Mammedov2014-02-101-0/+5
| | | | | | | | | | | | | Split pcie_cap_slot_hotplug() into hotplug/unplug callbacks and register them as "hotplug-handler" interface implementation of PCIE_SLOT device. Replace pci_bus_hotplug() wiring with setting link on PCI BUS "hotplug-handler" property to PCI_BRIDGE_DEV device. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci/shpc: convert SHPC hotplug to use hotplug-handler APIIgor Mammedov2014-02-101-0/+8
| | | | | | | | | | | | | Split shpc_device_hotplug() into hotplug/unplug callbacks and register them as "hotplug-handler" interface implementation of PCI_BRIDGE_DEV device. Replace pci_bus_hotplug() wiring with setting link on PCI BUS "hotplug-handler" property to PCI_BRIDGE_DEV device. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* qdev:pci: refactor PCIDevice to use generic "hotpluggable" propertyIgor Mammedov2014-02-101-3/+0
| | | | | | | | | Get rid of PCIDevice specific PCIDeviceClass.no_hotplug and use generic DeviceClass.hotpluggable field instead. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: add pci_for_each_bus_depth_firstMichael S. Tsirkin2014-01-261-0/+14
| | | | | | Useful for ACPI hotplug. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci: do not export pci_bus_resetPaolo Bonzini2013-12-231-1/+0
| | | | | | | | | qbus_reset_all can be used instead. There is no semantic change because pcibus_reset returns 1 and takes care of the device tree traversal. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* xen-pvdevice: make device-id property compulsoryPaul Durrant2013-12-011-1/+0
| | | | | | | | | | | The intention of the Xen PV device is that it is used as a parent device for PV drivers in Xen HVM guests and the set of PV drivers that bind to the device is determined by its device ID (and possibly vendor ID and revision). As such, the device should not have a default device ID, it should always be supplied by the Xen toolstack. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
* Revert "hw/pci: partially handle pci master abort"Marcel Apfelbaum2013-11-101-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit a53ae8e934cd54686875b5bcfc2f434244ee55d6. The patch being reverted introduced a low-priority memory region covering all 64 bit pci address space. This exposed the following bugs elsewhere in the code: 1. Some memory regions have INT64_MAX size, where the intent was all 64 bit address space. This results in a sub-page region, should be UINT64_MAX. 2. page table rendering in exec.c ignores physical address bits above TARGET_PHYS_ADDR_SPACE_BITS. Access outside this range (e.g. from device DMA, or gdb stub) ends up with a wrong region. Registering a region outside this range leads to page table corruption. 3. Some regions overlap PCI hole and have same priority. This only works as long as no device uses the overlapping address. It doesn't look like we can resolve all issues in time for 1.7. Let's fix the bugs first and apply afterwards for 1.8. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* bswap.h: Remove le32_to_cpupu()Peter Maydell2013-11-051-1/+1
| | | | | | | | | | Replace the legacy le32_to_cpupu() with ldl_le_p(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1383669517-25598-5-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
* bswap.h: Remove le16_to_cpupu()Peter Maydell2013-11-051-1/+1
| | | | | | | | | | Replace the legacy le16_to_cpupu() with lduw_le_p(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1383669517-25598-4-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
* bswap.h: Remove cpu_to_le32wu()Peter Maydell2013-11-051-1/+1
| | | | | | | | | | Replace the legacy cpu_to_le32wu() with stl_le_p(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1383669517-25598-3-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
* bswap.h: Remove cpu_to_le16wu()Peter Maydell2013-11-051-1/+1
| | | | | | | | | | Replace the legacy cpu_to_le16wu() with stw_le_p(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1383669517-25598-2-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@amazon.com>
* Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-10-314-21/+51
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci, pc, acpi fixes, enhancements This includes some pretty big changes: - pci master abort support by Marcel - pci IRQ API rework by Marcel - acpi generation support by myself Everything has gone through several revisions, latest versions have been on list for a while without any more comments, tested by several people. Please pull for 1.7. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Tue 15 Oct 2013 07:33:48 AM CEST using RSA key ID D28D5469 # gpg: Can't check signature: public key not found * mst/tags/for_anthony: (39 commits) ssdt-proc: update generated file ssdt: fix PBLK length i386: ACPI table generation code from seabios pc: use new api to add builtin tables acpi: add interface to access user-installed tables hpet: add API to find it pvpanic: add API to access io port ich9: APIs for pc guest info piix: APIs for pc guest info acpi/piix: add macros for acpi property names i386: define pc guest info loader: allow adding ROMs in done callbacks i386: add bios linker/loader loader: use file path size from fw_cfg.h acpi: ssdt pcihp: updat generated file acpi: pre-compiled ASL files acpi: add rules to compile ASL source i386: add ACPI table files from seabios q35: expose mmcfg size as a property q35: use macro for MCFG property name ... Message-id: 1381818560-18367-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
| * q35: expose mmcfg size as a propertyMichael S. Tsirkin2013-10-141-0/+1
| | | | | | | | | | | | | | | | | | | | Address is already exposed, expose size for symmetry. Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * q35: use macro for MCFG property nameMichael S. Tsirkin2013-10-141-0/+2
| | | | | | | | | | | | | | | | | | | | Useful to make it accessible through QOM. Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * pcie_host: expose address formatMichael S. Tsirkin2013-10-141-0/+21
| | | | | | | | | | | | | | | | | | | | | | Callers pass in the address so it's helpful for them to be able to decode it. Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * pcie_host: expose UNMAPPED macroMichael S. Tsirkin2013-10-141-0/+3
| | | | | | | | | | | | | | | | | | | | Make it possible to test unmapped status through QMP. Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/pci: removed irq field from PCIDeviceMarcel Apfelbaum2013-10-141-3/+0
| | | | | | | | | | | | | | | | | | Instead of exposing the the irq field, pci wrappers to qemu_set_irq or qemu_irq_* can be used. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/pcie: AER and hot-plug events must use device's interruptMarcel Apfelbaum2013-10-141-18/+0
| | | | | | | | | | | | | | | | | | The fields hpev_intx and aer_intx were removed because both AER and hot-plug events must use device's interrupt. Assert/deassert interrupts using pci irq wrappers instead. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/pci: add pci wrappers for allocating and asserting irqsMarcel Apfelbaum2013-10-141-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Interrupt pin is selected and saved into PCI_INTERRUPT_PIN register during device initialization. Devices should not call directly qemu_set_irq and specify the INTx pin on each call. Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise, qemu_irq_lower and qemu_irq_pulse, setting the irq based on PCI_INTERRUPT_PIN. Added pci_allocate_irq wrapper to be used by devices that still need PCIDevice infrastructure to assert irqs. Renamed a static method which was named already pci_set_irq. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * hw/pci: partially handle pci master abortMarcel Apfelbaum2013-10-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A MemoryRegion with negative priority was created and it spans over all the pci address space. It "intercepts" the accesses to unassigned pci address space and will follow the pci spec: 1. returns -1 on read 2. does nothing on write Note: setting the RECEIVED MASTER ABORT bit in the STATUS register of the device that initiated the transaction will be implemented in another series Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-09-301-0/+1
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pc,pci,virtio fixes and cleanups This includes pc and pci cleanups and enhancements, and a virtio-net bugfix related to softmac programming. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 29 Sep 2013 01:51:16 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Michael S. Tsirkin (8) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: smbios: Factor out smbios_maybe_add_str() smbios: Make multiple -smbios type= accumulate sanely smbios: Improve diagnostics for conflicting entries smbios: Convert to QemuOpts smbios: Normalize smbios_entry_add()'s error handling to exit(1) virtio-net: fix up HMP NIC info string on reset pci: remove explicit check to 64K ioport size piix4: disable io on reset piix: use 64 bit window programmed by guest q35: use 64 bit window programmed by guest pci: add helper to retrieve the 64-bit range range: add min/max operations on ranges range: add Range to typedefs q35: make pci window address/size match guest cfg Message-id: 1380437951-21788-1-git-send-email-mst@redhat.com
| * pci: add helper to retrieve the 64-bit rangeMichael S. Tsirkin2013-09-151-0/+1
| | | | | | | | Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | lsi: add 53C810 variantHervé Poussineau2013-09-161-0/+1
|/ | | | | | | | | | | | | Currently, treat it exactly as a 53C895A. 53C895A is a 53C810 with more capabilities, so this should work. However, this lets us test different code paths on Linux, which don't use lastest features if it detect a 810, or on some OSes which only support 810 and not 895A (like very old Windows NT versions). Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-09-031-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pc,pci,virtio fixes and cleanups This includes pc and pci cleanups and enhancements, and a virtio bugfix for level interrupts. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 01 Sep 2013 03:15:36 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Michael S. Tsirkin (3) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: virtio_pci: fix level interrupts with irqfd pc: reduce duplication, fix PIIX descriptions hw: Clean up bogus default boot order pci: add config space access traces pc: fix regression for 64 bit PCI memory pci: Introduce helper to retrieve a PCI device's DMA address space Message-id: 1378023590-11109-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
| * pci: Introduce helper to retrieve a PCI device's DMA address spaceAlexey Kardashevskiy2013-08-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A PCI device's DMA address space (possibly an IOMMU) is returned by a method on the PCIBus. At the moment that only has one caller, so the method is simply open coded. We'll need another caller for VFIO, so this patch introduces a helper/wrapper function. If IOMMU is not set, the pci_device_iommu_address_space() function returns the parent's IOMMU skipping the "bus master" address space as otherwise proper emulation would require more effort for no benefit. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> [aik: added inheritance from parent if iommu is not set for the current bus] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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