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* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2014-08-191-11/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SCSI changes that enable sending vendor-specific commands via virtio-scsi. Memory changes for QOMification and automatic tracking of MR lifetime. # gpg: Signature made Mon 18 Aug 2014 13:03:09 BST using RSA key ID 9B4D86F2 # gpg: Good signature from "Paolo Bonzini <pbonzini@redhat.com>" # gpg: aka "Paolo Bonzini <bonzini@gnu.org>" * remotes/bonzini/tags/for-upstream: mtree: remove write-only field memory: Use canonical path component as the name memory: Use memory_region_name for name access memory: constify memory_region_name exec: Abstract away ref to memory region names loader: Abstract away ref to memory region names tpm_tis: remove instance_finalize callback memory: remove memory_region_destroy memory: convert memory_region_destroy to object_unparent ioport: split deletion and destruction nic: do not destroy memory regions in cleanup functions vga: do not dynamically allocate chain4_alias sysbus: remove unused function sysbus_del_io qom: object: move unparenting to the child property's release callback qom: object: delete properties before calling instance_finalize virtio-scsi: implement parse_cdb scsi-block, scsi-generic: implement parse_cdb scsi-block: extract scsi_block_is_passthrough scsi-bus: introduce parse_cdb in SCSIDeviceClass and SCSIBusInfo scsi-bus: prepare scsi_req_new for introduction of parse_cdb Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * memory: Use canonical path component as the namePeter Crosthwaite2014-08-181-1/+0
| | | | | | | | | | | | | | | | | | | | Rather than having the name as separate state. This prepares support for creating a MemoryRegion dynamically (i.e. without memory_region_init() and friends) and the MemoryRegion still getting a usable name. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * memory: constify memory_region_namePeter Crosthwaite2014-08-181-1/+1
| | | | | | | | | | | | | | | | It doesn't change the MR and some prospective call sites will have const MRs at hand. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * memory: remove memory_region_destroyPaolo Bonzini2014-08-181-9/+0
| | | | | | | | | | | | | | The function is empty after the previous patch, so remove it. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | trace: [tcg] Include TCG-tracing helpersLluís Vilanova2014-08-123-0/+4
| | | | | | | | | | Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* | exec: fix migration with devices that use address_space_rwPaolo Bonzini2014-07-221-0/+11
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Devices that use address_space_rw to write large areas to memory (as opposed to address_space_map/unmap) were broken with respect to migration since fe680d0 (exec: Limit translation limiting in address_space_translate to xen, 2014-05-07). Such devices include IDE CD-ROMs. The reason is that invalidate_and_set_dirty (called by address_space_rw but not address_space_map/unmap) was only setting the dirty bit for the first page in the translation. To fix this, introduce cpu_physical_memory_set_dirty_range_nocode that is the same as cpu_physical_memory_set_dirty_range except it does not muck with the DIRTY_MEMORY_CODE bitmap. This function can be used if the caller invalidates translations with tb_invalidate_phys_page_range. There is another difference between cpu_physical_memory_set_dirty_range and cpu_physical_memory_set_dirty_flag; the former includes a call to xen_modified_memory. This is handled separately in invalidate_and_set_dirty, and is not needed in other callers of cpu_physical_memory_set_dirty_range_nocode, so leave it alone. Just one nit: now that invalidate_and_set_dirty takes care of handling multiple pages, there is no need for address_space_unmap to wrap it in a loop. In fact that loop would now be O(n^2). Reported-by: Dave Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* memory: MemoryRegion: Add may-overlap and priority propsPeter Crosthwaite2014-07-011-1/+1
| | | | | | | | | | QOM propertyify the .may-overlap and .priority fields. The setters will re-add the memory as a subregion if needed (i.e. the values change when the memory region is already contained). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [Remove setters. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* memory: MemoryRegion: replace owner field with QOM parentPaolo Bonzini2014-07-011-1/+0
| | | | | | | The two are now the same. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* memory: MemoryRegion: QOMifyPeter Crosthwaite2014-07-011-0/+6
| | | | | | | | | | | | | | QOMify memory regions as an Object. The former init() and destroy() routines become instance_init() and instance_finalize() resp. memory_region_init() is re-implemented to be: object_initialize() + set fields memory_region_destroy() is re-implemented to call unparent(). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> [Add newly-created MR as child, unparent on destruction. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* vhost-user: fix regions provied with VHOST_USER_SET_MEM_TABLE messageDamjan Marion2014-06-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Old code was affected by memory gaps which resulted in buffer pointers pointing to address outside of the mapped regions. Here we are introducing following changes: - new function qemu_get_ram_block_host_ptr() returns host pointer to the ram block, it is needed to calculate offset of specific region in the host memory - new field mmap_offset is added to the VhostUserMemoryRegion. It contains offset where specific region starts in the mapped memory. As there is stil no wider adoption of vhost-user agreement was made that we will not bump version number due to this change - other fileds in VhostUserMemoryRegion struct are not changed, as they are all needed for usermode app implementation - region data is not taken from ram_list.blocks anymore, instead we use region data which is alredy calculated for use in vhost-net - Now multiple regions can have same FD and user applicaton can call mmap() multiple times with the same FD but with different offset (user needs to take care for offset page alignment) Signed-off-by: Damjan Marion <damarion@cisco.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Damjan Marion <damarion@cisco.com>
* tcg-ppc: Use uintptr_t in ppc_tb_set_jmp_targetRichard Henderson2014-06-231-1/+1
| | | | | Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* hostmem: add property to map memory with MAP_SHAREDPaolo Bonzini2014-06-192-1/+4
| | | | | | | | | | A new "share" property can be used with the "memory-file" backend to map memory with MAP_SHARED instead of MAP_PRIVATE. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hostmem: allow preallocation of any memory regionPaolo Bonzini2014-06-192-0/+11
| | | | | | | | | | | And allow preallocation of file-based memory even without -mem-prealloc. Some care is necessary because -mem-prealloc does not allow disabling preallocation for hostmem-file. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* memory: add error propagation to file-based RAM allocationPaolo Bonzini2014-06-192-2/+5
| | | | | | | | | | | | | Right now, -mem-path will fall back to RAM-based allocation in some cases. This should never happen with "-object memory-file", prepare the code by adding correct error propagation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> MST: drop \n at end of error messages
* memory: move mem_path handling to memory_region_allocate_system_memoryPaolo Bonzini2014-06-191-0/+18
| | | | | | | | | | | | | | | Like the previous patch did in exec.c, split memory_region_init_ram and memory_region_init_ram_from_file, and push mem_path one step further up. Other RAM regions than system memory will now be backed by regular RAM. Also, boards that do not use memory_region_allocate_system_memory will not support -mem-path anymore. This can be changed before the patches are merged by migrating boards to use the function. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* memory: move RAM_PREALLOC_MASK to exec.c, renamePaolo Bonzini2014-06-191-3/+0
| | | | | | | | | Prepare for adding more flags. The "_MASK" suffix is unique, kill it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* memory: reorganize file-based allocationPaolo Bonzini2014-06-192-3/+2
| | | | | | | | | | Split the internal interface in exec.c to a separate function, and push the check on mem_path up to memory_region_init_ram. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* NUMA: move numa related code to new file numa.cWanlong Gao2014-06-192-2/+2
| | | | | | | | | | | | | Signed-off-by: Wanlong Gao <gaowanlong@cn.fujitsu.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> MST: comment tweaks
* memory: add memory_region_is_mapped() APIIgor Mammedov2014-06-191-0/+8
| | | | | | | | which allows to check if MemoryRegion is already mapped. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* memory: MemoryRegion: rename parent to containerPaolo Bonzini2014-06-181-10/+10
| | | | | | | Avoid confusion with the QOM parent. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: introduce qemu_ram_unset_idstr() to unset RAMBlock idstrHu Tao2014-06-171-0/+1
| | | | | Signed-off-by: Hu Tao <hutao@cn.fujitsu.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* exec: replace ffsl with ctzlNatanael Copa2014-06-111-1/+1
| | | | | | | | | | | | See commit fbeadf50 (bitops: unify bitops_ffsl with the one in host-utils.h, call it bitops_ctzl) on why ctzl should be used instead of ffsl. This is also needed for musl libc which does not implement ffsl. Signed-off-by: Natanael Copa <ncopa@alpinelinux.org> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini2014-06-055-363/+368
| | | | | | | | Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: introduce cpu_ldst.hPaolo Bonzini2014-06-051-0/+35
| | | | | | | | | | This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: move softmmu_template.h out of include/Paolo Bonzini2014-06-051-533/+0
| | | | | | | It is only included in cputlb.c now. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: commonize helper definitionsPaolo Bonzini2014-06-051-0/+2
| | | | | | | | | They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: make do_unaligned_access a method of CPUPaolo Bonzini2014-06-051-12/+18
| | | | | | | | | We will reference it from more files in the next patch. To avoid ruining the small steps we're making towards multi-target, make it a method of CPU rather than just a global. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: move definition of CPU_MMU_INDEX to inclusion site, drop ACCESS_TYPEPaolo Bonzini2014-06-053-27/+16
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: move MMUSUFFIX under SOFTMMU_CODE_ACCESSPaolo Bonzini2014-06-051-9/+2
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* softmmu: start introducing SOFTMMU_CODE_ACCESS in softmmu_header.hPaolo Bonzini2014-06-052-5/+5
| | | | | | | | | This preprocessor symbol is already used in softmmu_template.h. We will use it to distinguish the two "fake" ACCESS_TYPEs NB_MMU_MODES and NB_MMU_MODES + 1. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* tcg: Move size effects out of dh_argRichard Henderson2014-05-282-50/+39
| | | | | | | Tidying the initialization of the args arrays at the same time. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Remove sizemask and flags arguments to tcg_gen_callNRichard Henderson2014-05-282-14/+7
| | | | | | Take them from the TCGHelperInfo struct instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Save flags and computed sizemask in TCGHelperInfoRichard Henderson2014-05-281-16/+28
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Move side effects out of dh_sizemaskRichard Henderson2014-05-282-15/+8
| | | | | | Moving them into dh_arg instead. Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Inline tcg_gen_helperNRichard Henderson2014-05-281-6/+6
| | | | | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Push tcg-runtime routines into exec/helper-*Richard Henderson2014-05-284-4/+11
| | | | | | | | Rather than special casing them, use the standard mechanisms for tcg helper generation. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg: Invert the inclusion of helper.hRichard Henderson2014-05-284-143/+166
| | | | | | | | | | Rather than include helper.h with N values of GEN_HELPER, include a secondary file that sets up the macros to include helper.h. This minimizes the files that must be rebuilt when changing the macros for file N. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* tcg-mips: Enable direct chaining of TBsRichard Henderson2014-05-241-2/+2
| | | | | | | | Now that the code_gen_buffer is constrained to not cross 256mb regions, we are assured that we can use J to reach another TB. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-s390-20140515' into ↵Peter Maydell2014-05-151-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging tcg/s390 updates # gpg: Signature made Thu 15 May 2014 17:24:40 BST using RSA key ID 4DD0279B # gpg: Can't check signature: public key not found * remotes/rth/tags/pull-tcg-s390-20140515: tcg-s390: Implement direct chaining of TBs tcg-s390: Don't force -march=z990 tcg-s390: Improve setcond tcg-s390: Allow immediate operands to add2 and sub2 tcg-s390: Implement tcg_register_jit tcg-s390: Use more risbg in the tlb sequence tcg-s390: Move ldst helpers out of line tcg-s390: Convert to new ldst opcodes tcg-s390: Integrate endianness into TCGMemOp tcg-s390: Convert to TCGMemOp tcg-s390: Fix off-by-one in wraparound andi Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * tcg-s390: Implement direct chaining of TBsRichard Henderson2014-05-151-0/+9
| | | | | | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* | Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell2014-05-151-3/+5
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * remotes/kvm/uq/master: pc: port 92 reset requires a low->high transition cpu: make CPU_INTERRUPT_RESET available on all targets apic: do not accept SIPI on the bootstrap processor target-i386: preserve FPU and MSR state on INIT target-i386: fix set of registers zeroed on reset kvm: forward INIT signals coming from the chipset kvm: reset state from the CPU's reset method target-i386: the x86 CPL is stored in CS.selector - auto update hflags accordingly. target-i386: set eflags prior to calling cpu_x86_load_seg_cache() in seg_helper.c target-i386: set eflags and cr0 prior to calling cpu_x86_load_seg_cache() in smm_helper.c target-i386: set eflags prior to calling svm_load_seg_cache() in svm_helper.c pci-assign: limit # of msix vectors pci-assign: Fix a bug when map MSI-X table memory failed kvm: make one_reg helpers available for everyone target-i386: Remove unused data from local array Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * cpu: make CPU_INTERRUPT_RESET available on all targetsPaolo Bonzini2014-05-131-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the x86, some devices need access to the CPU reset pin (INIT#). Provide a generic service to do this, using one of the internal cpu_interrupt targets. Generalize the PPC-specific code for CPU_INTERRUPT_RESET to other targets. Since PPC does not support migration across QEMU versions (its machine types are not versioned yet), I picked the value that is used on x86, CPU_INTERRUPT_TGT_INT_1. Consequently, TGT_INT_2 and TGT_INT_3 are shifted down by one while keeping their value. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | exec-all.h: Use stl_le_p instead of stl_p patching x86Richard Henderson2014-05-131-1/+1
| | | | | | | | | | | | | | | | We got the wrong version of stl_p, the one that bswaps as appropriate for the target. Since x86 is always little-endian, the "_le_" routine will resolve to what we want. Signed-off-by: Richard Henderson <rth@twiddle.net>
* | tcg: Define tcg_insn_unit for code pointersRichard Henderson2014-05-121-1/+1
| | | | | | | | | | | | | | | | | | To be defined by the tcg backend based on the elemental unit of the ISA. During the transition, allow TCG_TARGET_INSN_UNIT_SIZE to be undefined, which allows us to default tcg_insn_unit to the current uint8_t. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* | exec-all.h: Use stl_p to avoid undefined behaviour patching x86 jumpsPeter Maydell2014-05-121-1/+1
|/ | | | | | | | | | | | | | | | | | | The code which patches x86 jump instructions assumes it can do an unaligned write of a uint32_t. This is actually safe on x86, but it's still undefined behaviour. We have infrastructure for doing efficient unaligned accesses which doesn't engage in undefined behaviour, so use it. This is technically fractionally less efficient, at least with gcc 4.6; instead of one instruction: 7b2: 89 3e mov %edi,(%rsi) we get an extra spurious store to the stack slot: 7b2: 89 7c 24 64 mov %edi,0x64(%rsp) 7b6: 89 3e mov %edi,(%rsi) Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* docs/memory.txt: Fix document on MMIO operationsFam Zheng2014-05-071-1/+1
| | | | | | | | | | | .impl.valid should be .impl.unaligned and the description needs some fixes. .old_portio is removed since commit b40acf99b (ioport: Switch dispatching to memory core layer). Signed-off-by: Fam Zheng <famz@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changesRichard Henderson2014-04-281-1/+1
| | | | Signed-off-by: Richard Henderson <rth@twiddle.net>
* target-arm: A64: Implement DC ZVAPeter Maydell2014-04-171-0/+52
| | | | | | | | | | | Implement the DC ZVA instruction, which clears a block of memory. The fast path obtains a pointer to the underlying RAM via the TCG TLB data structure so we can do a direct memset(), with fallback to a simple byte-store loop in the slow path. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
* exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoderPeter Maydell2014-03-171-1/+1
| | | | | | | | | | The ARM A64 decoder's worst case number of TCG ops per instruction is 266 (for insn 0x4c800000, a post-indexed ST4 multiple-structures store). Raise the MAX_OP_PER_INSTR define accordingly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1394822294-14837-17-git-send-email-peter.maydell@linaro.org
* cputlb: Change tlb_set_page() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
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