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* cpus: Pass CPUState to [qemu_]cpu_has_work()Andreas Färber2012-10-312-2/+2
| | | | | | | | | | For target-mips also change the return type to bool. Make include paths for cpu-qom.h consistent for alpha and unicore32. Signed-off-by: Andreas Färber <afaerber@suse.de> [AF: Updated new target-openrisc function accordingly] Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
* spapr: Pass PowerPCCPU to hypercallsAndreas Färber2012-10-317-35/+42
| | | | | | | Needed for changing cpu_has_work() argument type to CPUState, used in h_cede(). Signed-off-by: Andreas Färber <afaerber@suse.de>
* spapr: Pass PowerPCCPU to spapr_hypercall()Andreas Färber2012-10-313-3/+5
| | | | | | Needed for changing the hypercall handlers' argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* target-ppc: Pass PowerPCCPU to cpu_ppc_hypercallAndreas Färber2012-10-311-1/+3
| | | | | | | | Adapt emulate_spapr_hypercall() accordingly. Needed for changing spapr_hypercall() argument type to PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
* xtensa_pic: Pass XtensaCPU to xtensa_ccompare_cb()Andreas Färber2012-10-311-2/+5
| | | | | | | Needed for changing cpu_has_work() argument type to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Max Filippov <jcmvbkbc@gmail.com>
* cpus: Pass CPUState to qemu_cpu_kick()Andreas Färber2012-10-315-6/+9
| | | | | | CPUArchState is no longer needed there. Signed-off-by: Andreas Färber <afaerber@suse.de>
* ppc: Pass PowerPCCPU to {ppc6xx,ppc970,power7,ppc40x,ppce500}_set_irq()Andreas Färber2012-10-311-20/+35
| | | | | | | Needed for changing qemu_cpu_kick() argument type to CPUState and for moving halted field into CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move stopped field to CPUStateAndreas Färber2012-10-311-1/+2
| | | | | | Change its type to bool. Signed-off-by: Andreas Färber <afaerber@suse.de>
* ppce500_spin: Store PowerPCCPU in SpinKickAndreas Färber2012-10-311-3/+3
| | | | | | Needed for moving stopped field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpus: Pass CPUState to qemu_cpu_is_self()Andreas Färber2012-10-311-2/+4
| | | | | | | | | Change return type to bool, move to include/qemu/cpu.h and add documentation. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com> [AF: Updated new caller qemu_in_vcpu_thread()]
* target-i386: Pass X86CPU to cpu_x86_load_seg_cache_sipi()Andreas Färber2012-10-301-1/+1
| | | | | | | | Simplifies the call in apic_sipi() again and needed for moving halted field to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
* apic: Store X86CPU in APICCommonStateAndreas Färber2012-10-304-24/+29
| | | | | | | | | | | Prepares for using a link<> property to connect APIC with CPU and for changing the CPU APIs to CPUState. Resolve Coding Style warnings by moving the closing parenthesis of foreach_apic() macro to next line. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
* target-i386: Inline APIC cpu_env property settingAndreas Färber2012-10-301-1/+0
| | | | | | | This prepares for changing the variable type from void*. Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
* target-i386: Initialize APIC at CPU levelIgor Mammedov2012-10-301-51/+5
| | | | | | | | | | | | | (L)APIC is a part of cpu [1] so move APIC initialization inside of x86_cpu object. Since cpu_model and override flags currently specify whether APIC should be created or not, APIC creation&initialization is moved into x86_cpu_apic_init() which is called from x86_cpu_realize(). [1] - all x86 cpus have integrated APIC if we overlook existence of i486, and it's more convenient to model after majority of them. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* Merge branch 'qspi.2' of git://developer.petalogix.com/public/qemuBlue Swirl2012-10-303-50/+340
|\ | | | | | | | | | | | | * 'qspi.2' of git://developer.petalogix.com/public/qemu: xilinx_zynq: added QSPI controller xilinx_spips: Generalised to model QSPI m25p80: Support for Quad SPI
| * xilinx_zynq: added QSPI controllerPeter Crosthwaite2012-10-291-12/+28
| | | | | | | | | | | | | | | | Added the QSPI controller to the Zynq. 4 SPI devices are attached to allow modelling of the different geometries. E.G. Dual parallel and dual stacked mode can both be tested with this one arrangement. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
| * xilinx_spips: Generalised to model QSPIPeter Crosthwaite2012-10-291-34/+255
| | | | | | | | | | | | | | | | | | Extended the xilinx spips controller to model QSPI as well. Paremeterised the operational difference with the normal spi controller (num_ss_bits, width of the tx/rx fifo heads etc.). Multiple bus functionality is modelled (needed for QSPI dual parallel mode. LQSPI is modelled. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
| * m25p80: Support for Quad SPIPeter Crosthwaite2012-10-291-4/+57
| | | | | | | | | | | | | | | | | | Added the Quad mode read and write commands. Data remains serialized on a single wire, i.e. the quad mode instructions just behave the same as single mode, with the expection of modelling the varying number of dummy/mode bytes between the address bytes and the first data word. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
* | Merge branch 's390-for-upstream' of git://repo.or.cz/qemu/agrafAurelien Jarno2012-10-308-2/+1211
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 's390-for-upstream' of git://repo.or.cz/qemu/agraf: s390: sclp ascii console support s390: sclp signal quiesce support s390: sclp event support s390: sclp base support s390: use sync regs for register transfer s390/kvm_stat: correct sys_perf_event_open syscall number s390x: fix -initrd in virtio machine
| * | s390: sclp ascii console supportHeinz Graalfs2012-10-292-1/+307
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code adds console support by implementing SCLP's ASCII Console Data event. This is the same console as LPARs ASCII console or z/VMs sysascii. The console can be specified manually with something like -chardev stdio,id=charconsole0 -device sclpconsole,chardev=charconsole0,id=console0 Newer kernels will autodetect that console and prefer that over virtio console. When data is received from the character layer it creates a service interrupt to trigger a Read Event Data command from the guest that will pick up the received character byte-stream. When characters are echo'ed by the linux guest a Write Event Data occurs which is forwarded by the Event Facility to the console that supports a corresponding mask value. Console resizing is not supported. The character layer byte-stream is buffered using a fixed size iov buffer. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | s390: sclp signal quiesce supportHeinz Graalfs2012-10-293-0/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implements the sclp signal quiesce event via the SCLP Event Facility. This allows to gracefully shutdown a guest by using system_powerdown notifiers. It creates a service interrupt that will trigger a Read Event Data command from the guest. This code will then add an event that is interpreted by linux guests as ctrl-alt-del. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | s390: sclp event supportHeinz Graalfs2012-10-296-2/+579
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several SCLP features are considered to be events. Those events don't provide SCLP commands on their own, instead they are all based on Read Event Data, Write Event Data, Write Event Mask and the service interrupt. Follow-on patches will provide SCLP's Signal Quiesce (via system_powerdown) and the ASCII console. Further down the road the sclp line mode console and configuration change events (e.g. cpu hotplug) can be implemented. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | s390: sclp base supportHeinz Graalfs2012-10-293-0/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a more generic infrastructure for handling Service-Call requests on s390. Currently we only support a small subset of Read SCP Info directly in target-s390x. This patch provides the base infrastructure for supporting more commands and moves Read SCP Info. In the future we could add additional commands for hotplug, call home and event handling. Signed-off-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Jens Freimann <jfrei@linux.vnet.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
| * | s390x: fix -initrd in virtio machineAlexander Graf2012-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using -initrd in the virtio machine, we need to indicate the initrd start and size inside the kernel image. These parameters need to be stored in native endianness. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
* | | Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2012-10-2911-133/+212
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio,pci infrastructure This includes infrastructure patches that don't do much by themselves but should help vfio and q35 make progress. Also included is rework of virtio-net to use iovec APIs for vector access - helpful to make it more secure and in preparation for a new feature that will allow arbitrary s/g layout for guests. Also included is a pci bridge bugfix by Avi. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * mst/tags/for_anthony: (25 commits) pci: avoid destroying bridge address space windows in a transaction virtio-net: enable mrg buf header in tap on linux virtio-net: test peer header support at init time virtio-net: minor code simplification virtio-net: simplify rx code virtio-net: switch tx to safe iov functions virtio-net: first s/g is always at start of buf virtio-net: refactor receive_hdr virtio-net: use safe iov operations for rx virtio-net: avoid sg copy iov: add iov_cpy virtio-net: track host/guest header length pcie: Convert PCIExpressHost to use the QOM. pcie: pass pcie window size to pcie_host_mmcfg_update() pci: Add class 0xc05 as 'SMBus' pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzle pci_ids: add intel 82801BA pci-to-pci bridge id pci: pci capability must be in PCI space pci: make each capability DWORD aligned qemu: enable PV EOI for qemu 1.3 ... Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * | pci: avoid destroying bridge address space windows in a transactionAvi Kivity2012-10-292-30/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling memory_region_destroy() in a transaction is illegal (and aborts), as until the transaction is committed, the region remains live. Fix by moving destruction until after the transaction commits. This requires having an extra set of regions, so the new and old regions can coexist. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: enable mrg buf header in tap on linuxMichael S. Tsirkin2012-10-292-21/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modern linux supports arbitrary header size, which makes it possible to pass mrg buf header to tap directly without iovec mangling. Use this capability when it is there. This removes the need to deal with it in vhost-net as we do now. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: test peer header support at init timeMichael S. Tsirkin2012-10-291-9/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | There's no reason to query header support at random times: at load or feature query. Driver also might not query functions. Cleaner to do it at device init. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: minor code simplificationMichael S. Tsirkin2012-10-291-3/+1
| | | | | | | | | | | | | | | | | | | | | During packet filtering, we can now use host hdr len to offset incoming buffer unconditionally. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: simplify rx codeMichael S. Tsirkin2012-10-291-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove code duplication using guest header length that we track. Drop specific layout requirement for rx buffers: things work using generic iovec functions in any case. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: switch tx to safe iov functionsMichael S. Tsirkin2012-10-291-12/+19
| | | | | | | | | | | | | | | | | | | | | Avoid mangling iovec manually: use safe iov_* functions. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: first s/g is always at start of bufMichael S. Tsirkin2012-10-291-2/+3
| | | | | | | | | | | | | | | | | | We know offset is 0, assert that. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: refactor receive_hdrMichael S. Tsirkin2012-10-291-11/+7
| | | | | | | | | | | | | | | | | | | | | | | | Now that we know host hdr length, we don't need to duplicate the logic in receive_hdr: caller can figure out the offset itself. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: use safe iov operations for rxMichael S. Tsirkin2012-10-291-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid magling iov manually: use safe iov operations for processing packets incoming to guest. This also removes the requirement for virtio header to fit the first s/g entry exactly. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: avoid sg copyMichael S. Tsirkin2012-10-291-25/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid tweaking iovec during receive. This removes the need to copy the vector. Note: we currently have an evil cast in work_around_broken_dhclient and unfortunately this patch does not fix it - just pushes the evil cast to another place. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | virtio-net: track host/guest header lengthMichael S. Tsirkin2012-10-291-12/+17
| | | | | | | | | | | | | | | | | | | | | | | | Tracking these in device state instead of re-calculating on each packet. No functional changes. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pcie: Convert PCIExpressHost to use the QOM.Jason Baron2012-10-292-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | Let's use PCIExpressHost with QOM. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pcie: pass pcie window size to pcie_host_mmcfg_update()Jason Baron2012-10-292-12/+16
| | | | | | | | | | | | | | | | | | | | | | | | This allows q35 to pass/set the size of the pcie window in its update routine. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: Add class 0xc05 as 'SMBus'Jan Kiszka2012-10-292-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | [jbaron@redhat.com: add PCI_CLASS_SERIAL_SMBUS definition] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: introduce pci_swizzle_map_irq_fn() for standardized interrupt pin swizzleIsaku Yamahata2012-10-292-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce pci_swizzle_map_irq_fn() for interrupt pin swizzle which is standardized. PCI bridge swizzle is common logic, by introducing this function duplicated swizzle logic will be avoided later. [jbaron@redhat.com: drop opaque argument] Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci_ids: add intel 82801BA pci-to-pci bridge idIsaku Yamahata2012-10-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Adds pci id constants which will be used by q35. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: pci capability must be in PCI spaceIsaku Yamahata2012-10-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci capability must be in PCI space. It can't lay in PCIe extended config space. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Jason Baron <jbaron@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: make each capability DWORD alignedMichael S. Tsirkin2012-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | PCI spec (see e.g. 6.7 Capabilities List in spec rev 3.0) requires that each capability is DWORD aligned. Ensure this when allocating space by rounding size up to 4. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | qemu: enable PV EOI for qemu 1.3Michael S. Tsirkin2012-10-291-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | Enable KVM PV EOI by default. You can still disable it with -kvm_pv_eoi cpu flag. To avoid breaking cross-version migration, enable only for qemu 1.3 (or in the future, newer) machine type. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: Return PCI_INTX_DISABLED when no bus INTx routing supportAlex Williamson2012-10-291-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than assert, simply return PCI_INTX_DISABLED when we don't have a pci_route_irq_fn. PIIX already returns DISABLED for an invalid pin, so users already deal with this state. Users of this interface should only be acting on an ENABLED or INVERTED return value (though we really have no support for INVERTED). Also complain loudly when we hit this so we don't forget it's missing. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Jan Kiszka <jan.kiszka@siemens.com>
| * | pci-assign: Use msi_get_message()Alex Williamson2012-10-291-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | pci-assign only uses a subset of the flexibility msi_get_message() provides, but it's still worthwhile to use it. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | msi: Add msi_get_message()Alex Williamson2012-10-292-16/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | vfio-pci and pci-assign both do this on their own for setting up direct MSI injection through KVM. Provide a helper function for this in MSI code. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci-assign: Use pci_intx_route_changed()Alex Williamson2012-10-291-2/+1
| | | | | | | | | | | | | | | | | | | | | Replace open coded version Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * | pci: Helper function for testing if an INTx route changedAlex Williamson2012-10-292-0/+6
| | | | | | | | | | | | | | | Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | | pci: avoid destroying bridge address space windows in a transactionAvi Kivity2012-10-292-30/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling memory_region_destroy() in a transaction is illegal (and aborts), as until the transaction is committed, the region remains live. Fix by moving destruction until after the transaction commits. This requires having an extra set of regions, so the new and old regions can coexist. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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