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* Add endianness as io mem parameterAlexander Graf2010-12-111-1/+2
| | | | | | | | | | | | | As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Replace qemu_malloc + memset with qemu_malloczBlue Swirl2010-08-201-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | Replace a qemu_malloc call, followed by a memset, with qemu_mallocz. Found with this Coccinelle semantic patch, adapted from Coccinelle test package rule 94: @@ type T; expression x; expression E; @@ - x = (T)qemu_malloc(E) + x = qemu_mallocz(E) ... ( - memset(x,0,E); | - memset(x,0,sizeof(*x)); ) Some files (tests/*) had to be filtered out. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Replace assert(0) with abort() or cpu_abort()Blue Swirl2010-03-181-3/+3
| | | | | | | | | When building with -DNDEBUG, assert(0) will not stop execution so it must not be used for abnormal termination. Use cpu_abort() when in CPU context, abort() otherwise. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-2/+2
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-2/+2
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* Make CPURead/WriteFunc structure 'const'Blue Swirl2009-08-251-2/+2
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove io_index argument from cpu_register_io_memory()Avi Kivity2009-06-161-1/+1
| | | | | | | | | The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Include assert.h from qemu-common.hPaul Brook2009-05-131-1/+0
| | | | | | | Include assert.h from qemu-common.h and remove other direct uses. cpu-all.h still need to include it because of the dyngen-exec.h hacks Signed-off-by: Paul Brook <paul@codesourcery.com>
* hw: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-3/+1
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
* Use the ARRAY_SIZE() macro where appropriate.malc2008-12-221-5/+4
| | | | | | | | | Change from v1: Avoid changing the existing coding style in certain files. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
* SH4: kill a few warningsaurel322008-12-071-1/+1
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162
* SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).balrog2008-12-071-2/+5
| | | | | | | | | | | | | | | | | | | | | Main purpose of this is to delete *physical = address & 0x1fffffff; at target-sh4/helper.c:449, using new mmio rule introduced by #5849 This masking is a nice trick to realize P4/A7 duality of SH registers. But, IMHO, it is logically wrong. Most of SH4 cpu control registers in P4 area(0xfc000000...0xffffffff) have one more address called A7 which is usually P4 address with upper 3bits masked. This is an address only appears in TLB's physical address part. Current code use trick writing drivers as if they are really in A7 (that's why you see many *_A7 in hw/sh*.c), and using translation P4 to A7. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5935 c046a42c-6fe2-441c-8c8c-71466251a162
* sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII).balrog2008-12-071-0/+15
| | | | | | | | | | | This patch adds IRL(4bit encoded 15 level interrupt input) support to SH using qemu_irq as a multi level (!=on/off) signal. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5925 c046a42c-6fe2-441c-8c8c-71466251a162
* Change MMIO callbacks to use offsets, not absolute addresses.pbrook2008-12-011-1/+2
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
* SH4: Switch serial emulation to qemu_irqaurel322008-11-211-1/+4
| | | | | | | | | | | | | | | | | This patches makes SH serial emulation use qemu_irq in its interface. * hw/sh.h (sh_serial_init): Take qemu_irq, not intc_source. * hw/sh7750.c (sh7750_init): Adjust. * hw/sh_intc.c (sh_intc_set_irq): Don't assert or deassert irq more than once. * hw/sh_serial.c (sh_serial_state): Use qemu_irq, not intc_source. (sh_serial_clear_fifo, sh_serial_ioport_write) (sh_serial_receive_byte): Adjust. (sh_serial_init): Take qemu_irq, not intc_source. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5769 c046a42c-6fe2-441c-8c8c-71466251a162
* SH4: Use qemu_irq in timer emulation.aurel322008-11-211-0/+10
| | | | | | | | | | | | | | | * hw/sh.h (tmu012_init): Accept qemu_irq, not intc_source. * hw/sh7750.c (sh7750_init): Pass qemu_irq to tmu012_init. * hw/sh_intc.c (sh_intc_set_irq): New. (sh_intc_init): Allocate irqs. * hw/sh_intc.h (struct intc_desc): New field irqs. * hw/sh_timer.c (sh_timer_state): Use qemu_irq, not intc_source. (sh_timer_update): Use qemu_set_irq, not sh_intc_toggle_source. (sh_timer_init, tmu012_init): Adjust. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5768 c046a42c-6fe2-441c-8c8c-71466251a162
* SH4: system emulator interrupt update, by Magnus Damm.ths2007-12-021-27/+96
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
* Break up vl.h.pbrook2007-11-171-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
* sh775x interrupt controller by Magnus Damm.balrog2007-10-041-0/+383
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3327 c046a42c-6fe2-441c-8c8c-71466251a162
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