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* sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber2013-01-211-5/+5
| | | | | | | | | | | Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* exec: Return CPUState from qemu_get_cpu()Andreas Färber2013-01-151-1/+1
| | | | | | | Move the declaration to qemu/cpu.h and add documentation. The implementation still depends on CPUArchState for CPU iteration. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move cpu_index field to CPUStateAndreas Färber2013-01-151-2/+3
| | | | | | | | | | | | | Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
* Make all static TypeInfos constAndreas Färber2013-01-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Since 39bffca2030950ef6efe57c2fac8327a45ae1015 (qdev: register all types natively through QEMU Object Model), TypeInfo as used in the common, non-iterative pattern is no longer amended with information and should therefore be const. Fix the documented QOM examples: sed -i 's/static TypeInfo/static const TypeInfo/g' include/qom/object.h Since frequently the wrong examples are being copied by contributors of new devices, fix all types in the tree: sed -i 's/^static TypeInfo/static const TypeInfo/g' */*.c sed -i 's/^static TypeInfo/static const TypeInfo/g' */*/*.c This also avoids to piggy-back these changes onto real functional changes or other refactorings. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-3/+3
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pxa2xx_gpio: Store ARMCPU in PXA2xxGPIOInfoAndreas Färber2012-06-111-4/+5
| | | | | | | | | Prepares for moving halted field into CPUState. Add missing braces. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Peter Maydell <peter.maydell@linaro.org>
* arm hw/: Don't use CPUStateAndreas Färber2012-03-141-2/+2
| | | | | | | | | | Scripted conversion: for file in hw/arm-misc.h hw/arm_boot.c hw/arm_pic.c hw/armv7m.c hw/exynos4210.h hw/highbank.c hw/integratorcp.c hw/musicpal.c hw/omap.h hw/pxa.h hw/pxa2xx_gpio.c hw/pxa2xx_pic.c hw/realview.c hw/strongarm.h hw/versatilepb.c hw/vexpress.c hw/xilinx_zynq.c ; do sed -i "s/CPUState/CPUARMState/g" $file done Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Anthony Liguori <aliguori@us.ibm.com>
* qom: Unify type registrationAndreas Färber2012-02-151-2/+3
| | | | | | | | | | | | | Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qdev: register all types natively through QEMU Object ModelAnthony Liguori2012-02-031-7/+9
| | | | | | | | | | | | | | | | | | | | | This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori2012-01-271-10/+19
| | | | | | | This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* sysbus: rename sysbus_init_mmio_region() to sysbus_init_mmio()Avi Kivity2011-11-281-1/+1
| | | | Signed-off-by: Avi Kivity <avi@redhat.com>
* pxa2xx_gpio: convert to memory APIBenoît Canet2011-11-241-18/+11
| | | | | Signed-off-by: Benoit Canet <benoit.canet@gmail.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* pxa2xx_pic: update to use qdevDmitry Eremin-Solenikov2011-02-251-4/+7
| | | | | | | | | | Use qdev/sysbus framework to handle pxa2xx-pic. Instead of exposing IRQs via array, reference them via qdev_get_gpio_in(). Patch has been modified by the committer. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
* pxa2xx_gpio: switch to using qdevDmitry Eremin-Solenikov2011-01-291-77/+73
| | | | | | | | | As noted by Markus Armbruster pxa2xx_gpio vmstate version bumped because of a change in the or .ilevel / .olevel arrays are saved, for convenience. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
* Add endianness as io mem parameterAlexander Graf2010-12-111-1/+1
| | | | | | | | | | | | | As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* savevm: Add DeviceState paramAlex Williamson2010-07-061-1/+1
| | | | | | | | | | When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-3/+3
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-3/+3
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* Make CPURead/WriteFunc structure 'const'Blue Swirl2009-08-251-2/+2
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove io_index argument from cpu_register_io_memory()Avi Kivity2009-06-161-1/+1
| | | | | | | | | The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Follow coding conventionsPaul Brook2009-05-101-16/+16
| | | | | | Remove explicit struct qualifiers and rename structure types. Signed-off-by: Paul Brook <paul@codesourcery.com>
* Replace cpu_abort with hw_errorPaul Brook2009-05-081-4/+2
| | | | Signed-off-by: Paul Brook <paul@codesourcery.com>
* Change MMIO callbacks to use offsets, not absolute addresses.pbrook2008-12-011-4/+0
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
* Better STOPINTR bit semantics in the PXA2xx DMA.balrog2007-11-171-0/+5
| | | | | | | | Don't error out on reading GPCR register, just warn (Thorsten Zitterell). Don't zero a memory that's already zeroed. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3676 c046a42c-6fe2-441c-8c8c-71466251a162
* Break up vl.h.pbrook2007-11-171-1/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert PXA2xx GPIOs and SCOOP GPIOs to a qemu_irq based api (similar to ↵balrog2007-11-171-21/+20
| | | | | | | | | | omap, max7310 and s3c gpios). Convert spitz and gumstix boards to use new api. Remove now obsolete gpio_handler_t definition. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3670 c046a42c-6fe2-441c-8c8c-71466251a162
* Several corrections in the spitzkbd keymap (patch by Juergen Lock).balrog2007-10-041-0/+7
| | | | | | | Don't abort on illegal GPSR reads, instead only warn. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3324 c046a42c-6fe2-441c-8c8c-71466251a162
* find -type f | xargs sed -i 's/[\t ]$//g' # on most filesths2007-09-161-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix off-by-one memory region sizes.pbrook2007-06-031-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2931 c046a42c-6fe2-441c-8c8c-71466251a162
* Savevm/loadvm bits for ARM core, the PXA2xx peripherals and Spitz hardware.balrog2007-05-241-0/+48
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2857 c046a42c-6fe2-441c-8c8c-71466251a162
* Core features of ARM XScale processors. Main PXA270 and PXA255 peripherals.balrog2007-04-301-0/+290
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2749 c046a42c-6fe2-441c-8c8c-71466251a162
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