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* pci: Tidy up PCI host bridgesAndreas Färber2012-08-221-1/+1
| | | | | | | | Adopt the QOM parent field name and enforce QOM-style access via casts. Don't just typedef PCIHostState, either use it directly or embed it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGEAndreas Färber2012-08-221-2/+2
| | | | | | | Use PCIHostState and PCI_HOST_BRIDGE() where appropriate. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppce500_pci: QOM'ify e500 PCI host bridgeAndreas Färber2012-08-221-5/+11
| | | | | | | | | Introduce type constant and cast macro. Avoid accessing parent fields directly. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: Make host bridge TypeInfos constAndreas Färber2012-08-221-2/+2
| | | | | | | | | During the QOM migration they were amended with further info but this is no longer the case. All static TypeInfos can be const these days. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qom: Unify type registrationAndreas Färber2012-02-151-2/+3
| | | | | | | | | | | | | Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qdev: register all types natively through QEMU Object ModelAnthony Liguori2012-02-031-12/+16
| | | | | | | | | | | | | | | | | | | | | This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori2012-01-271-5/+12
| | | | | | | This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: convert to QEMU Object ModelAnthony Liguori2012-01-271-7/+14
| | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppce500_pci: remove sysbus_init_mmio_cb2 usageBenoît Canet2011-12-191-21/+6
| | | | | | | | | Expose only one container MemoryRegion to sysbus. (Peter Maydell's idea) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Benoît Canet <benoit.canet@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppce500_pci: convert to memory APIAvi Kivity2011-11-241-20/+14
| | | | Signed-off-by: Avi Kivity <avi@redhat.com>
* ppc/e500_pci: Fix an array overflow issueLiu Yu-B132012011-10-301-16/+22
| | | | | | | | When access PPCE500_PCI_IW1 the previous index get overflow. The patch fix the issue and update all to keep consistent style. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc/e500_pci: Fix code styleLiu Yu-B132012011-10-301-20/+56
| | | | | | | | Put trailing statements on next line. Signed-off-by: Liu Yu <yu.liu@freescale.com> Reviewed-by: Andreas Färber <andreas.faerber@web.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* pci_host: convert conf index and data ports to memory APIAvi Kivity2011-09-041-11/+10
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
* Revert "Merge remote-tracking branch 'qemu-kvm/memory/batch' into staging"Anthony Liguori2011-08-251-10/+11
| | | | | | | | | | | | This reverts commit 8ef9ea85a2cc1007eaefa53e6871f1f83bcef22d, reversing changes made to 444dc48298c480e42e15a8fe676be737d8a6b2a1. From Avi: Please revert the entire pull (git revert 8ef9ea85a2cc1) while I work this out - it isn't trivial. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci_host: convert conf index and data ports to memory APIAvi Kivity2011-08-241-11/+10
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
* ppce500_pci: convert to sysbus_init_mmio_cb2()Avi Kivity2011-08-221-1/+11
| | | | | | | | Not a huge step forward, but at least we now have a 1:1 relationship between registration and unregistration. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: pass I/O address space to new PCI busAvi Kivity2011-08-081-3/+4
| | | | | | | | | This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: pass address space to pci bus when createdAvi Kivity2011-07-291-1/+5
| | | | | | | | | This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppce500: move device/vendor/class id to qdevMichael S. Tsirkin2011-06-151-10/+3
| | | | Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* PPC: Qdev'ify e500 pciAlexander Graf2011-05-121-60/+76
| | | | | | | | | | | The e500 PCI controller isn't qdev'ified yet. This leads to severe issues when running with -drive. To be able to use a virtio disk with an e500 VM, let's convert the PCI controller over to qdev. Reviewed-by: Paul Brook <paul@codesourcery.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* vmstate: port ppce500_pciJuan Quintela2011-04-221-47/+40
| | | | Signed-off-by: Juan Quintela <quintela@redhat.com>
* mpc85xx_pci_map_irq: change "unknow" to "unknown"Scott Wood2011-04-091-1/+1
| | | | | | Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* pci-host: Delegate bswap to mmio layerAlexander Graf2010-12-111-2/+4
| | | | | | | | | | | | The only reason we have bswap versions of the pci host code is that most pci host devices are little endian. The ppc e500 is the only odd one here, being big endian. So let's directly pass the endianness down to the mmio layer and not worry about it on the pci host layer. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add endianness as io mem parameterAlexander Graf2010-12-111-1/+2
| | | | | | | | | | | | | As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Revert "PPC: Qdev'ify e500 pci"Anthony Liguori2010-09-081-73/+33
| | | | | | This reverts commit 13b7fdeffa68e3382231a70308593ae6a75d96c3. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Revert "PPC: Make e500 pci byte swap config data"Anthony Liguori2010-09-081-1/+1
| | | | | | This reverts commit cfb207e643d94e3e96d456b1df14c5e36f6aa9e5. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* PPC: Make e500 pci byte swap config dataAlexander Graf2010-09-051-1/+1
| | | | | | | The config data field on the e500 pci controller is in little endian, so we need to enable byte swap there. Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: Qdev'ify e500 pciAlexander Graf2010-09-051-33/+73
| | | | | | | | | | The e500 PCI controller isn't qdev'ified yet. This leads to severe issues when running with -drive. To be able to use a virtio disk with an e500 VM, let's convert the PCI controller over to qdev. Signed-off-by: Alexander Graf <agraf@suse.de>
* pci: use PCI_DEVFN() where appropriate.Isaku Yamahata2010-07-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Use PCI_DEVFN() and PCI_FUNC_MAX where appropriate. This patch make it clear that func = 0. test: The following object files with/without this patch are stripped and compared. They remains same. arm-softmmu/versatile_pci.o libhw32/ppce500_pci.o libhw32/unin_pci.o libhw64/ppce500_pci.o libhw64/unin_pci.o mips-softmmu/gt64xxx.o mips64-softmmu/gt64xxx.o mips64el-softmmu/gt64xxx.o mipsel-softmmu/gt64xxx.o Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Yu Liu <yu.liu@freescale.com> Cc: Paul Brook <paul@codesourcery.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* savevm: Add DeviceState paramAlex Williamson2010-07-061-2/+2
| | | | | | | | | | When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Compile most PPC devices only onceBlue Swirl2010-03-301-2/+0
| | | | | | Make byte swapping unconditional since PPC is big endian. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Compile pci_host only onceBlue Swirl2010-03-211-2/+2
| | | | | | | | | | | Convert pci_host_conf_register_mmio_noswap(x) to pci_host_conf_register_mmio(x, 0). Convert pci_host_conf_register_mmio(x) to pci_host_conf_register_mmio(x, 1) for big endian hosts, all cases happen to be BE. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* pci: shorten pci_host_{conf, data}_register_xxx function a bit.Isaku Yamahata2009-12-011-2/+2
| | | | | | | | | pci_host_data_register_io_memory and its variants are too long a bit. So shorten them. Now they are pci_host_{conf, data}_register_{mmio, mmio_noswap, ioport}() Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci_host: consolidate pci config address access.Isaku Yamahata2009-11-091-33/+1
| | | | | | | consolidate pci_config address access into pci_host.c Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci_host.h: move functions in pci_host.h into .c file.Isaku Yamahata2009-11-091-16/+1
| | | | | | | | | | | | | | | | | | | | | | split static functions in pci_host.h into pci_host.c and pci_host_template.h. Later a structures declared in pci_host.h, PCIHostState, will be used. However pci_host.h doesn't allow to include itself easily. This patches addresses it. pci_host.h includes functions which are instantiated in .c by including pci_host.h with typedefing pci_addr_t. pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio or target_phys_addr_t for mmio in .c file. That prevents from including pci_host.h to use PCIHostState because of requiring type, pci_addr_t. Its purpose to include is to instantiate io function for mmio or ioio depending on which pci host bridge requires ioio or mmio. To avoid including code, we always instantiate both version. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-6/+6
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-6/+6
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* We want the argument pass to set_irq to be opaqueJuan Quintela2009-09-041-1/+3
| | | | | | | piix_pci want to pass more things that the pic Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Make CPURead/WriteFunc structure 'const'Blue Swirl2009-08-251-6/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Fix build with DEBUG_PCI in pci_host.h enabledBlue Swirl2009-07-201-5/+8
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove io_index argument from cpu_register_io_memory()Avi Kivity2009-06-161-3/+3
| | | | | | | | | The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Add common BusStatePaul Brook2009-05-231-1/+2
| | | | | | | | | | | Implement and use a common device bus state. The main side-effect is that creating a bus and attaching it to a parent device are no longer separate operations. For legacy code we allow a NULL parent, but that should go away eventually. Also tweak creation code to veriry theat a device in on the right bus. Signed-off-by: Paul Brook <paul@codesourcery.com>
* Replace gcc variadic macro extension with C99 versionBlue Swirl2009-05-131-2/+2
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add and use remaining #defines for PCI device IDs (Stuart Brady)aliguori2009-03-131-2/+2
| | | | | | | | | | | | | | | | | | | This patch adds and uses #defines for the remaining hardcoded PCI device IDs. It also moves definitions taken from linux/pci_ids.h into a separate header (hw/pci_ids.h), removes the 'RTL' from PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E to match Linux's definition. Changes in v2: * Don't use C99-style comments * Move definitions from linux/pci_ids.h into a separate header * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
* kvm/powerpc: Add freescale pci controller's supportaurel322009-03-021-0/+365
This patch add the emulation of freescale's pci controller for MPC85xx platform. Signed-off-by: Liu Yu <yu.liu@freescale.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6661 c046a42c-6fe2-441c-8c8c-71466251a162
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