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* Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori2013-09-034-6/+6
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QOM CPUState refactorings / X86CPU * Conversion of global CPU list to QTAILQ - preparing for CPU hot-unplug * Document X86CPU magic numbers for CPUID cache info # gpg: Signature made Tue 03 Sep 2013 10:59:22 AM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (3) and Eduardo Habkost (1) # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: target-i386: Use #defines instead of magic numbers for CPUID cache info cpu: Replace qemu_for_each_cpu() cpu: Use QTAILQ for CPU list a15mpcore: Use qemu_get_cpu() for generic timers
| * cpu: Use QTAILQ for CPU listAndreas Färber2013-09-034-6/+6
| | | | | | | | | | | | | | Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: Andreas Färber <afaerber@suse.de>
* | Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-09-039-14/+8
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pc,pci,virtio fixes and cleanups This includes pc and pci cleanups and enhancements, and a virtio bugfix for level interrupts. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 01 Sep 2013 03:15:36 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Michael S. Tsirkin (3) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: virtio_pci: fix level interrupts with irqfd pc: reduce duplication, fix PIIX descriptions hw: Clean up bogus default boot order pci: add config space access traces pc: fix regression for 64 bit PCI memory pci: Introduce helper to retrieve a PCI device's DMA address space Message-id: 1378023590-11109-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <anthony@codemonkey.ws>
| * hw: Clean up bogus default boot orderMarkus Armbruster2013-08-289-14/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We set default boot order "cad" in every single machine definition except "pseries" and "moxiesim", even though very few boards actually care for boot order, and "cad" makes sense for even fewer. Machines that care: * pc and its variants Accept up to three letters 'a', 'b' (undocumented alias for 'a'), 'c', 'd' and 'n'. Reject all others (fatal with -boot). * nseries (n800, n810) Check whether order starts with 'n'. Silently ignored otherwise. * prep, g3beige, mac99 Extract the first character the machine understands (subset of 'a'..'f'). Silently ignored otherwise. * spapr Accept an arbitrary string (vl.c restricts it to contain only 'a'..'p', no duplicates). * sun4[mdc] Use the first character. Silently ignored otherwise. Strip characters these machines ignore from their default boot order. For all other machines, remove the unused default boot order alltogether. Note that my rename of QEMUMachine member boot_order to default_boot_order and QEMUMachineInitArgs member boot_device to boot_order has a welcome side effect: it makes every use of boot orders visible in this patch, for easy review. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | PPC: spapr: iommu: rework tracesAlexey Kardashevskiy2013-09-021-47/+24
| | | | | | | | | | | | | | | | This converts old style fprintf to traces. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [agraf: change patch subject] Signed-off-by: Alexander Graf <agraf@suse.de>
* | spapr: add "stop-self" RTAS call required to support hot CPU unplugAlexey Kardashevskiy2013-09-021-0/+23
| | | | | | | | | | | | | | | | | | | | | | PAPR+ requires two RTAS calls to be supported by the hypervisor in order to allow hotplugging VCPUs from the guest. The "start-cpu" RTAS call was already there but "stop-self" was not. This adds the "stop-self" RTAS call. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
* | pseries: Add H_SET_MODE hcall to change guest exception endiannessAnton Blanchard2013-09-022-1/+51
| | | | | | | | | | | | | | | | | | H_SET_MODE is used for controlling various partition settings. One of these settings is the endianness a guest takes its exceptions in. Signed-off-by: Anton Blanchard <anton@samba.org> [agraf: fix whitespace] Signed-off-by: Alexander Graf <agraf@suse.de>
* | spapr-pci: rework MSI/MSIXAlexey Kardashevskiy2013-09-022-38/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the sPAPR platform a guest allocates MSI/MSIX vectors via RTAS hypercalls which return global IRQ numbers to a guest so it only operates with those and never touches MSIMessage. Therefore MSIMessage handling is completely hidden in QEMU. Previously every sPAPR PCI host bridge implemented its own MSI window to catch msi_notify()/msix_notify() calls from QEMU devices (virtio-pci or vfio) and route them to the guest via qemu_pulse_irq(). MSIMessage used to be encoded as: .addr - address within the PHB MSI window; .data - the device index on PHB plus vector number. The MSI MR write function translated this MSIMessage to a global IRQ number and called qemu_pulse_irq(). However the total number of IRQs is not really big (at the moment it is 1024 IRQs starting from 4096) and even 16bit data field of MSIMessage seems to be enough to store an IRQ number there. This simplifies MSI handling in sPAPR PHB. Specifically, this does: 1. remove a MSI window from a PHB; 2. add a single memory region for all MSIs to sPAPREnvironment and spapr_pci_msi_init() to initialize it; 3. encode MSIMessage as: * .addr - a fixed address of SPAPR_PCI_MSI_WINDOW==0x40000000000ULL; * .data as an IRQ number. 4. change IRQ allocator to align first IRQ number in a block for MSI. MSI uses lower bits to specify the vector number so the first IRQ has to be aligned. MSIX does not need any special allocator though. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* | spapr-pci: fix config space access to support bridgesAlexey Kardashevskiy2013-09-021-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | spapr-pci config space accessors use find_dev() to find a PCI device. However find_dev() only searched on a primary bus and did not do recursive search through secondary buses so config space access was not possible for devices other that on a primary bus. This fixed find_dev() by using the PCI API pci_find_device() function. This effectively enabled pci bridges on spapr. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* | ppc405_boards: Don't enforce presence of firmware for qtestAndreas Färber2013-09-021-15/+20
| | | | | | | | | | | | | | Adopt error_report() while at it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* | ppc405_uc: Disable debug outputAndreas Färber2013-09-021-8/+8
| | | | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* | ppc405_boards: Disable debug outputAndreas Färber2013-09-021-2/+2
| | | | | | | | | | | | | | Also move one stray debug output into an #ifdef. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* | ppc: virtex_ml507: QEMU_OPTION_dtb support for this machine.Efimov Vasily2013-09-021-10/+19
| | | | | | | | | | | | | | | | | | QEMU has 'dtb' option for specifing the device tree file for the kernel. The patch adds support for this option to the 'virtex_ml507' machine implementation. Signed-off-by: Efimov Vasily <real@ispras.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
* | PPC: E500: Generate device tree on resetAlexander Graf2013-09-021-9/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Today we generate the device tree once on machine initialization and then store the finalized blob in memory to reload it on reset. This is bad for 2 reasons. First we potentially waste a bunch of RAM for no good reason, as we have all information required to regenerate the device tree available anyways. The second reason is even more important. On machine init when we generate the device tree for the first time, we don't have all of the devices fully initialized yet. But the device tree needs to potentially walk devices to put information about them into the device tree. Move the generation into a reset function. That way we just generate it new every time we reset, solving both of the above issues. Signed-off-by: Alexander Graf <agraf@suse.de>
* | Merge remote-tracking branch 'mst/tags/for_anthony' into stable-1.5Anthony Liguori2013-08-294-53/+23
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pc,pci,virtio fixes and cleanups This includes pc and pci cleanups, future-proofing of ROM files, and a virtio bugfix correcting splice on virtio console. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 26 Aug 2013 01:34:20 AM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By Markus Armbruster (5) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: virtio: virtqueue_get_avail_bytes: fix desc_pa when loop over the indirect descriptor table pc_piix: Kill pc_init1() memory region args pc: pc_compat_1_4() now can call pc_compat_1_5() pc: Create pc_compat_*() functions pc: Kill pc_init_pci_1_0() pc: Don't explode QEMUMachineInitArgs into local variables needlessly pc: Don't prematurely explode QEMUMachineInitArgs ppc: Don't duplicate QEMUMachineInitArgs in PPCE500Params ppc: Don't explode QEMUMachineInitArgs into local variables needlessly sun4: Don't prematurely explode QEMUMachineInitArgs q35: Add PCIe switch to example q35 configuration loader: store FW CFG ROM files in RAM arch_init: align MR size to target page size pc: cleanup 1.4 compat support Message-id: 1377535318-30491-1-git-send-email-mst@redhat.com
| * ppc: Don't duplicate QEMUMachineInitArgs in PPCE500ParamsMarkus Armbruster2013-08-214-41/+23
| | | | | | | | | | | | | | | | | | | | Pass on the generic arguments unadulterated, and the machine-specific ones as separate argument. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alexander Graf <agraf@suse.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * ppc: Don't explode QEMUMachineInitArgs into local variables needlesslyMarkus Armbruster2013-08-212-24/+12
| | | | | | | | | | | | | | | | | | Don't explode when the variable is used just once, and never changed. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Alexander Graf <agraf@suse.de> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | aio / timers: Switch entire codebase to the new timer APIAlex Bligh2013-08-224-45/+45
|/ | | | | | | | | | | This is an autogenerated patch using scripts/switch-timer-api. Switch the entire code base to using the new timer API. Note this patch may introduce some line length issues. Signed-off-by: Alex Bligh <alex@alex.org.uk> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* spapr: Rename 'dprintf' to 'DPRINTF'Peter Maydell2013-07-291-4/+4
| | | | | | | | | | | | | | 'dprintf' is the name of a POSIX standard function so we should not be stealing it for our debug macro. Rename to 'DPRINTF' (in line with a number of other source files.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: MORITA Kazutaka <morita.kazutaka@lab.ntt.co.jp> Acked-by: Richard Henderson <rth@twiddle.net> Acked-by: Kevin Wolf <kwolf@redhat.com> Message-id: 1375100199-13934-5-git-send-email-peter.maydell@linaro.org Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* spapr_pci: QOM cast cleanupAndreas Färber2013-07-291-3/+4
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* ppce500_spin: QOM cast cleanupAndreas Färber2013-07-291-6/+8
| | | | | | Introduce type constant and use QOM cast. Signed-off-by: Andreas Färber <afaerber@suse.de>
* xics: rename types to be sane and follow coding styleAnthony Liguori2013-07-291-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basically, in HW the layout of the interrupt network is: - One ICP per processor thread (the "presenter"). This contains the registers to fetch a pending interrupt (ack), EOI, and control the processor priority. - One ICS per logical source of interrupts (ie, one per PCI host bridge, and a few others here or there). This contains the per-interrupt source configuration (target processor(s), priority, mask) and the per-interrupt internal state. Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit oddball what pHyp does here, arguably there are two but we can ignore that distinction). There is no register level access. A pair of firmware (RTAS) calls is used to configure each virtual interrupt. So our model here is somewhat the same. We have one ICS in the emulated XICS which arguably *is* the emulated XICS, there's no point making it a separate "device", that would just be gross, and each VCPU has an associated ICP. Yet we call the "XICS" struct icp_state and then the ICPs 'struct icp_server_state'. It's particularly confusing when all of the functions have xics_prefixes yet take *icp arguments. Rename: struct icp_state -> XICSState struct icp_server_state -> ICPState struct ics_state -> ICSState struct ics_irq_state -> ICSIRQState Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com [aik: added ics_resend() on post_load] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pseries: savevm support with KVMAlexey Kardashevskiy2013-07-291-22/+84
| | | | | | | | | | | | At present, the savevm / migration support for the pseries machine will not work when KVM is enabled. That's because KVM manages the guest's hash page table in the host kernel, so qemu has no visibility of it. This patch fixes this by using new kernel interfaces to extract and reinsert the guest's hash table during the migration process. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 1374175984-8930-11-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pseries: savevm support for PCI host bridgeDavid Gibson2013-07-291-0/+49
| | | | | | | | | | This adds the necessary support for saving the state of the PAPR virtual PCI host bridge (or host bridges). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-10-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pseries: savevm support for pseries machineDavid Gibson2013-07-292-5/+272
| | | | | | | | | | | | | | | | | | | | | | | | | | This adds the necessary pieces to implement savevm / migration for the pseries machine. The most complex part here is migrating the hash table - for the paravirtualized pseries machine the guest's hash page table is not stored within guest memory, but externally and the guest accesses it via hypercalls. This patch uses a hypervisor reserved bit of the HPTE as a dirty bit (tracking changes to the HPTE itself, not the page it references). This is used to implement a live migration style incremental save and restore of the hash table contents. Normally a hash table is 16MB but it can get bigger depending on how much RAM the guest has. Due to its nature, updates to it are random so the live migration style is used for it. In addition it adds VMStateDescription information to save and restore the (few) remaining pieces of state information needed by the pseries machine. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-9-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* spapr-tce: make sPAPRTCETable a proper deviceAnthony Liguori2013-07-294-54/+99
| | | | | | | | | | | | | | | | | | | | | | Model TCE tables as a device that's hooked up as a child object to the owner. Besides the code cleanup, we get a few nice benefits: 1) free actually works now (it was dead code before) 2) the TCE information is visible in the device tree 3) we can expose table information as properties such that if we change the window_size, we can use globals to keep migration working. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-6-git-send-email-aliguori@us.ibm.com [dwg: pseries: savevm support for PAPR TCE tables] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> [alexey: ppc kvm: fix to compile] Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pseries: savevm support for VIO devicesDavid Gibson2013-07-291-0/+20
| | | | | | | | | | This patch adds helpers to allow PAPR VIO devices to save state common to all VIO devices during savevm. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-3-git-send-email-aliguori@us.ibm.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc440_bamboo: do not use isa_mmioPaolo Bonzini2013-07-251-1/+4
| | | | | | | | | This fixes endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-10-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* prep: fix I/O port endiannessPaolo Bonzini2013-07-251-1/+1
| | | | | | | | | Do not swap endianness here, it will happen during cpu_{in,out}{b,w,l}. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-6-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* spapr_pci: remove indirection for I/O port accessAlexey Kardashevskiy2013-07-251-39/+2
| | | | | | | | | | This fixes endianness bugs in I/O port access. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-5-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc_newworld: do not use isa_mmioPaolo Bonzini2013-07-251-1/+4
| | | | | | | | | This fixes endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-4-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc_oldworld: do not use isa_mmioPaolo Bonzini2013-07-251-1/+4
| | | | | | | | | This fixes endianness bugs in I/O port access. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-3-git-send-email-pbonzini@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* PPC: dbdma: Wait for DMA until we have dataAlexander Graf2013-07-111-0/+1
| | | | | | | | | | | We should only start processing DMA requests when we have data to process. Hold off working through the DMA shuffling until the IDE core told us that it's ready. This is required because the guest can program the DMA engine or the IDE transfer first. Both are legal. Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: dbdma: macio: Add DMA callbackAlexander Graf2013-07-111-0/+2
| | | | | | | We need to know when the IDE core starts a DMA transfer. Add a notifier function so we have the chance to start transmitting data. Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: g3beige: Move secondary IDE bus to mac-ioAlexander Graf2013-07-111-9/+8
| | | | | | | | | On a real G3 Beige the secondary IDE bus lives on the mac-io chip, not on some random PCI device. Move it there to become more compatible. While at it, also clean up the IDE channel connection logic. Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: Mac: Fix guest exported tbfreq valuesAlexander Graf2013-07-112-4/+6
| | | | | | | | | | We can tell the guest the frequency of its time base through fwcfg. However, we tell it a different value from the speed tb actually runs at. Let's fix it and make the tbfreq initialization and the fwcfg exposure use the same values. Signed-off-by: Alexander Graf <agraf@suse.de>
* pseries: move interrupt controllers to hw/intc/Alexey Kardashevskiy2013-07-112-588/+1
| | | | | | Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* spapr: Respect -bios command line option for SLOFAndreas Färber2013-07-111-1/+4
| | | | | | | | | Allow the user to override the firmware file name rather than always using "slof.bin". Reported-by: Dinar Valeev <k0da@opensuse.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* spapr: Use named enum for function remove_hpteStefan Weil2013-07-111-4/+4
| | | | | | | | | | | The function returned a target_ulong which was made from unnamed enum values. The target_ulong was then assigned to an int variable which was used in a switch statement. Using a named enum in both cases makes reviews easier. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Alexander Graf <agraf@suse.de>
* spapr: Fix compiler warnings for some versions of gccStefan Weil2013-07-112-3/+3
| | | | | | | | | | | | | | | | | | | i686-w64-mingw32-gcc (GCC) 4.6.3 from Debian wheezy reports these warnings: hw/ppc/spapr_hcall.c:188:1: warning: control reaches end of non-void function [-Wreturn-type] hw/ppc/spapr_pci.c:454:1: warning: control reaches end of non-void function [-Wreturn-type] Both warnings are fixed by using g_assert_not_reached instead of assert. A second line with assert(0) in spapr_pci.c which did not raise a compiler warning was modified, too, because g_assert_not_reached documents the purpose of that statement and is not removed in release builds. Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
* Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori2013-07-105-30/+29
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QOM CPUState refactorings * Fix for OpenRISCCPU subclasses * Fix for gdbstub CPU selection * Move linux-user CPU functions into new header * CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al. * Fix some targets to consistently inline TCG code generation * Centrally log CPU reset # gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (41) and others # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: (43 commits) cpu: Move reset logging to CPUState target-ppc: Change LOG_MMU_STATE() argument to CPUState target-i386: Change LOG_PCALL_STATE() argument to CPUState log: Change log_cpu_state[_mask]() argument to CPUState target-i386: Change do_smm_enter() argument to X86CPU target-i386: Change do_interrupt_all() argument to X86CPU target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU target-unicore32: Change gen_intermediate_code_internal() signature target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU target-s390x: Change gen_intermediate_code_internal() argument to S390CPU target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU target-microblaze: Change gen_intermediate_code_internal() argument types target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU target-i386: Change gen_intermediate_code_internal() argument to X86CPU target-cris: Change gen_intermediate_code_internal() argument to CRISCPU target-arm: Change gen_intermediate_code_internal() argument to ARMCPU target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU ...
| * intc/openpic: Build openpic only onceAndreas Färber2013-07-091-0/+1
| | | | | | | | | | | | | | | | | | Since current_cpu is CPUState it no longer depends on CPUPPCState. Move ppce500_set_mpic_proxy() to a new hw/ppc/ppc_e500.h because hw/ppc/ppc.h is too heavily using CPUPPCState and PowerPCCPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Make first_cpu and next_cpu CPUStateAndreas Färber2013-07-094-26/+23
| | | | | | | | | | | | | | | | | | | | | | | | Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: Paolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: Andreas Färber <afaerber@suse.de>
| * cpu: Replace cpu_single_env with CPUState current_cpuAndreas Färber2013-07-092-4/+5
| | | | | | | | | | | | Move it to qom/cpu.h. Signed-off-by: Andreas Färber <afaerber@suse.de>
* | Simplify -machine option queries with qemu_get_machine_opts()Markus Armbruster2013-07-092-27/+13
| | | | | | | | | | | | | | | | | | | | | | The previous two commits fixed bugs in -machine option queries. I can't find fault with the remaining queries, but let's use qemu_get_machine_opts() everywhere, for consistency, simplicity and robustness. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372943363-24081-7-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* | Fix -machine options accel, kernel_irqchip, kvm_shadow_memMarkus Armbruster2013-07-091-9/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Multiple -machine options with the same ID are merged. All but the one without an ID are to be silently ignored. In most places, we query these options with a null ID. This is correct. In some places, we instead query whatever options come first in the list. This is wrong. When the -machine processed first happens to have an ID, options are taken from that ID, and the ones specified without ID are silently ignored. Example: $ upstream-qemu -nodefaults -S -display none -monitor stdio -machine id=foo -machine accel=kvm,usb=on $ upstream-qemu -nodefaults -S -display none -monitor stdio -machine id=foo,accel=kvm,usb=on -machine accel=xen $ upstream-qemu -nodefaults -S -display none -monitor stdio -machine accel=xen -machine id=foo,accel=kvm,usb=on $ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine accel=kvm,usb=on QEMU 1.5.50 monitor - type 'help' for more information (qemu) info kvm kvm support: enabled (qemu) info usb (qemu) q $ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine id=foo -machine accel=kvm,usb=on QEMU 1.5.50 monitor - type 'help' for more information (qemu) info kvm kvm support: disabled (qemu) info usb (qemu) q $ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine id=foo,accel=kvm,usb=on -machine accel=xen QEMU 1.5.50 monitor - type 'help' for more information (qemu) info kvm kvm support: enabled (qemu) info usb USB support not enabled (qemu) q $ qemu-system-x86_64 -nodefaults -S -display none -monitor stdio -machine accel=xen -machine id=foo,accel=kvm,usb=on xc: error: Could not obtain handle on privileged command interface (2 = No such file or directory): Internal error xen be core: can't open xen interface failed to initialize Xen: Operation not permitted Option usb is queried correctly, and the one without an ID wins, regardless of option order. Option accel is queried incorrectly, and which one wins depends on option order and ID. Affected options are accel (and its sugared forms -enable-kvm and -no-kvm), kernel_irqchip, kvm_shadow_mem. Additionally, option kernel_irqchip is normally on by default, except it's off when no -machine options are given. Bug can't bite, because kernel_irqchip is used only when KVM is enabled, KVM is off by default, and enabling always creates -machine options. Downstreams that enable KVM by default do get bitten, though. Use qemu_get_machine_opts() to fix these bugs. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-id: 1372943363-24081-5-git-send-email-armbru@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Merge remote-tracking branch 'mst/tags/for_anthony' into stagingAnthony Liguori2013-07-087-6/+16
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci,misc enhancements This includes some pci enhancements: Better support for systems with multiple PCI root buses FW cfg interface for more robust pci programming in BIOS Minor fixes/cleanups for fw cfg and cross-version migration - because of dependencies with other patches Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Sun 07 Jul 2013 03:11:18 PM CDT using RSA key ID D28D5469 # gpg: Can't check signature: public key not found # By David Gibson (10) and others # Via Michael S. Tsirkin * mst/tags/for_anthony: pci: Fold host_buses list into PCIHostState functionality pci: Remove domain from PCIHostBus pci: Simpler implementation of primary PCI bus pci: Add root bus parameter to pci_nic_init() pci: Add root bus argument to pci_get_bus_devfn() pci: Replace pci_find_domain() with more general pci_root_bus_path() pci: Use helper to find device's root bus in pci_find_domain() pci: Abolish pci_find_root_bus() pci: Move pci_read_devaddr to pci-hotplug-old.c pci: Cleanup configuration for pci-hotplug.c pvpanic: fix fwcfg for big endian hosts pvpanic: initialization cleanup MAINTAINERS: s/Marcelo/Paolo/ e1000: cleanup process_tx_desc pc_piix: cleanup init compat handling pc: pass PCI hole ranges to Guests pci: store PCI hole ranges in guestinfo structure range: add Range structure Message-id: 1373228271-31223-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| * pci: Add root bus parameter to pci_nic_init()David Gibson2013-07-076-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | At present, pci_nic_init() and pci_nic_init_nofail() assume that they will only create a NIC under the primary PCI root. As we add support for multiple PCI roots, that may no longer be the case. This patch adds a root bus parameter to pci_nic_init() (and updates callers accordingly) to allow the machine init code using it to specify the right PCI root for NICs created by old-style -net nic parameters. NICs created new-style, with -device can of course be put anywhere. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * pci: Replace pci_find_domain() with more general pci_root_bus_path()David Gibson2013-07-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pci_find_domain() is used in a number of places where we want an id for a whole PCI domain (i.e. the subtree under a PCI root bus). The trouble is that many platforms may support multiple independent host bridges with no hardware supplied notion of domain number. This patch, therefore, replaces calls to pci_find_domain() with calls to a new pci_root_bus_path() returning a string. The new call is implemented in terms of a new callback in the host bridge class, so it can be defined in some way that's well defined for the platform. When no callback is available we fall back on the qbus name. Most current uses of pci_find_domain() are for error or informational messages, so the change in identifiers should be harmless. The exception is pci_get_dev_path(), whose results form part of migration streams. To maintain compatibility with old migration streams, the PIIX PCI host is altered to always supply "0000" for this path, which matches the old domain number (since the code didn't actually support domains other than 0). For the pseries (spapr) PCI bridge we use a different platform-unique identifier (pseries machines can routinely have dozens of PCI host bridges). Theoretically that breaks migration streams, but given that we don't yet have migration support for pseries, it doesn't matter. Any other machines that have working migration support including PCI devices will need to be updated to maintain migration stream compatibility. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | hw/p*: pass owner to memory_region_init* functionsPaolo Bonzini2013-07-045-13/+15
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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