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This patch replaces explicit bswaps with endianness hints to the
mmio layer.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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As stated before, devices can be little, big or native endian. The
target endianness is not of their concern, so we need to push things
down a level.
This patch adds a parameter to cpu_register_io_memory that allows a
device to choose its endianness. For now, all devices simply choose
native endian, because that's the same behavior as before.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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When available, we'd like to be able to access the DeviceState
when registering a savevm. For buses with a get_dev_path()
function, this will allow us to create more unique savevm
id strings.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Convert pci_host_conf_register_mmio_noswap(x) to
pci_host_conf_register_mmio(x, 0).
Convert pci_host_conf_register_mmio(x) to
pci_host_conf_register_mmio(x, 1) for big endian hosts, all cases
happen to be BE.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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pci_host_data_register_io_memory and its variants are too long a bit.
So shorten them. Now they are
pci_host_{conf, data}_register_{mmio, mmio_noswap, ioport}()
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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split static functions in pci_host.h into pci_host.c and
pci_host_template.h.
Later a structures declared in pci_host.h, PCIHostState, will be used.
However pci_host.h doesn't allow to include itself easily. This patches
addresses it.
pci_host.h includes functions which are instantiated in .c by including
pci_host.h with typedefing pci_addr_t.
pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio
or target_phys_addr_t for mmio in .c file.
That prevents from including pci_host.h to use PCIHostState because of
requiring type, pci_addr_t.
Its purpose to include is to instantiate io function for mmio or ioio
depending on which pci host bridge requires ioio or mmio.
To avoid including code, we always instantiate both version.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Some not so obvious bits, slirp and Xen were left alone for the time
being.
Signed-off-by: malc <av1474@comtv.ru>
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piix_pci want to pass more things that the pic
Signed-off-by: Juan Quintela <quintela@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and
updates later added users of qemu_register_reset), we solved the
problem it originally addressed less invasively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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The parameter is always zero except when registering the three internal
io regions (ROM, unassigned, notdirty). Remove the parameter to reduce
the API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Implement and use a common device bus state. The main side-effect is
that creating a bus and attaching it to a parent device are no longer
separate operations. For legacy code we allow a NULL parent, but that
should go away eventually.
Also tweak creation code to veriry theat a device in on the right bus.
Signed-off-by: Paul Brook <paul@codesourcery.com>
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Add the parameter 'order' to qemu_register_reset and sort callbacks on
registration. On system reset, callbacks with lower order will be
invoked before those with higher order. Update all existing users to the
standard order 0.
Note: At least for x86, the existing users seem to assume that handlers
are called in their registration order. Therefore, the patch preserves
this property. If someone feels bored, (s)he could try to identify this
dependency and express it properly on callback registration.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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This patch adds and uses #defines for the remaining hardcoded PCI
device IDs. It also moves definitions taken from linux/pci_ids.h
into a separate header (hw/pci_ids.h), removes the 'RTL' from
PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500
to PCI_DEVICE_ID_MPC8533E to match Linux's definition.
Changes in v2:
* Don't use C99-style comments
* Move definitions from linux/pci_ids.h into a separate header
* Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
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This patch adds and uses #defines for PCI device classes and subclases,
using a new pci_config_set_class() function, similar to the recently
added pci_config_set_vendor_id() and pci_config_set_device_id().
Change since v1: fixed compilation of hw/sun4u.c
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
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This patch defines PCI vendor and device IDs in pci.h (matching those
from Linux's pci_ids.h), and uses those definitions where appropriate.
Change from v1:
Introduces pci_config_set_vendor_id() / pci_config_set_device_id()
accessors as suggested by Anthony Liguori.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
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Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5883 c046a42c-6fe2-441c-8c8c-71466251a162
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This PCI controller can be found on a number of 4xx SoCs, including the 440EP.
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>
Acked-by: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5862 c046a42c-6fe2-441c-8c8c-71466251a162
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