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* exec: move include files to include/exec/Paolo Bonzini2012-12-191-1/+1
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* pci: update all users to look in pci/Michael S. Tsirkin2012-12-171-2/+2
| | | | | | update all users so we can remove the makefile hack. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-4/+4
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: Tidy up PCI host bridgesAndreas Färber2012-08-221-3/+5
| | | | | | | | Adopt the QOM parent field name and enforce QOM-style access via casts. Don't just typedef PCIHostState, either use it directly or embed it. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGEAndreas Färber2012-08-221-2/+2
| | | | | | | Use PCIHostState and PCI_HOST_BRIDGE() where appropriate. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ppc4xx_pci: QOM'ify ppc4xx PCI host bridgeAndreas Färber2012-08-221-5/+8
| | | | | | | | | Introduce type constant and cast macro. Avoid accessing its parent field directly. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: Make host bridge TypeInfos constAndreas Färber2012-08-221-2/+2
| | | | | | | | | During the QOM migration they were amended with further info but this is no longer the case. All static TypeInfos can be const these days. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qom: Unify type registrationAndreas Färber2012-02-151-2/+3
| | | | | | | | | | | | | Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qdev: register all types natively through QEMU Object ModelAnthony Liguori2012-02-031-12/+16
| | | | | | | | | | | | | | | | | | | | | This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori2012-01-271-5/+12
| | | | | | | This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: convert to QEMU Object ModelAnthony Liguori2012-01-271-7/+14
| | | | Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* PPC: 4xx: Qdevify the 440 PCI host controllerAlexander Graf2012-01-211-60/+65
| | | | | | | | | | | Due to popular demand, this qdevifies the PCI host controller of 4xx SoCs the same way as e500. We have to introduce a small stub function for pci init that will be removed in a later patch, once we qdev'ified the board, to keep the build working. Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: 440: Ignore invalid PCI IRQsAlexander Graf2012-01-211-0/+4
| | | | | | | | | | | | | When running a 440 target, we currently get invalid irq_num values (-1) which completely confuse the IRQ setting code. This is most likely due to the missing qdev conversion. While this shouldn't happen in the first place and should really rather be fixed by converting the target, I dislike segfaults. So for now, let's just print a warning and ignore invalid irq_num values. Signed-off-by: Alexander Graf <agraf@suse.de>
* ppc4xx_pci: convert to memory APIAvi Kivity2011-11-241-42/+26
| | | | Signed-off-by: Avi Kivity <avi@redhat.com>
* pci_host: convert conf index and data ports to memory APIAvi Kivity2011-09-041-4/+6
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
* Revert "Merge remote-tracking branch 'qemu-kvm/memory/batch' into staging"Anthony Liguori2011-08-251-6/+4
| | | | | | | | | | | | This reverts commit 8ef9ea85a2cc1007eaefa53e6871f1f83bcef22d, reversing changes made to 444dc48298c480e42e15a8fe676be737d8a6b2a1. From Avi: Please revert the entire pull (git revert 8ef9ea85a2cc1) while I work this out - it isn't trivial. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci_host: convert conf index and data ports to memory APIAvi Kivity2011-08-241-4/+6
| | | | | Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com>
* Use glib memory allocation and free functionsAnthony Liguori2011-08-201-2/+2
| | | | | | qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: pass I/O address space to new PCI busAvi Kivity2011-08-081-0/+1
| | | | | | | | | This lets us register BARs in the I/O address space. Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* pci: pass address space to pci bus when createdAvi Kivity2011-07-291-1/+4
| | | | | | | | | This is now done sloppily, via get_system_memory(). Eventually callers will be converted to stop using that. Reviewed-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* vmstate: port ppc4xx_pciJuan Quintela2011-04-221-41/+39
| | | | Signed-off-by: Juan Quintela <quintela@redhat.com>
* ppc4xx_pci: Declare as little endianAlexander Graf2010-12-111-15/+2
| | | | | | | | This patch replaces explicit bswaps with endianness hints to the mmio layer. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add endianness as io mem parameterAlexander Graf2010-12-111-2/+4
| | | | | | | | | | | | | As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* savevm: Add DeviceState paramAlex Williamson2010-07-061-2/+2
| | | | | | | | | | When available, we'd like to be able to access the DeviceState when registering a savevm. For buses with a get_dev_path() function, this will allow us to create more unique savevm id strings. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Compile pci_host only onceBlue Swirl2010-03-211-1/+1
| | | | | | | | | | | Convert pci_host_conf_register_mmio_noswap(x) to pci_host_conf_register_mmio(x, 0). Convert pci_host_conf_register_mmio(x) to pci_host_conf_register_mmio(x, 1) for big endian hosts, all cases happen to be BE. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* pci: shorten pci_host_{conf, data}_register_xxx function a bit.Isaku Yamahata2009-12-011-1/+1
| | | | | | | | | pci_host_data_register_io_memory and its variants are too long a bit. So shorten them. Now they are pci_host_{conf, data}_register_{mmio, mmio_noswap, ioport}() Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci_host.h: move functions in pci_host.h into .c file.Isaku Yamahata2009-11-091-17/+1
| | | | | | | | | | | | | | | | | | | | | | split static functions in pci_host.h into pci_host.c and pci_host_template.h. Later a structures declared in pci_host.h, PCIHostState, will be used. However pci_host.h doesn't allow to include itself easily. This patches addresses it. pci_host.h includes functions which are instantiated in .c by including pci_host.h with typedefing pci_addr_t. pci_addr_t is per pci host bridge and is typedef'ed to uint32_t for ioio or target_phys_addr_t for mmio in .c file. That prevents from including pci_host.h to use PCIHostState because of requiring type, pci_addr_t. Its purpose to include is to instantiate io function for mmio or ioio depending on which pci host bridge requires ioio or mmio. To avoid including code, we always instantiate both version. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Revert "Get rid of _t suffix"Anthony Liguori2009-10-011-9/+9
| | | | | | | | | | | | In the very least, a change like this requires discussion on the list. The naming convention is goofy and it causes a massive merge problem. Something like this _must_ be presented on the list first so people can provide input and cope with it. This reverts commit 99a0949b720a0936da2052cb9a46db04ffc6db29. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Get rid of _t suffixmalc2009-10-011-9/+9
| | | | | | | Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
* We want the argument pass to set_irq to be opaqueJuan Quintela2009-09-041-1/+3
| | | | | | | piix_pci want to pass more things that the pic Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Make CPURead/WriteFunc structure 'const'Blue Swirl2009-08-251-6/+6
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Update to a hopefully more future proof FSF addressBlue Swirl2009-07-161-2/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Revert "Introduce reset notifier order"Jan Kiszka2009-06-291-1/+1
| | | | | | | | | This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (and updates later added users of qemu_register_reset), we solved the problem it originally addressed less invasively. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Remove io_index argument from cpu_register_io_memory()Avi Kivity2009-06-161-3/+3
| | | | | | | | | The parameter is always zero except when registering the three internal io regions (ROM, unassigned, notdirty). Remove the parameter to reduce the API's power, thus facilitating future change. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Add common BusStatePaul Brook2009-05-231-1/+2
| | | | | | | | | | | Implement and use a common device bus state. The main side-effect is that creating a bus and attaching it to a parent device are no longer separate operations. For legacy code we allow a NULL parent, but that should go away eventually. Also tweak creation code to veriry theat a device in on the right bus. Signed-off-by: Paul Brook <paul@codesourcery.com>
* Introduce reset notifier orderJan Kiszka2009-05-221-1/+1
| | | | | | | | | | | | | | | Add the parameter 'order' to qemu_register_reset and sort callbacks on registration. On system reset, callbacks with lower order will be invoked before those with higher order. Update all existing users to the standard order 0. Note: At least for x86, the existing users seem to assume that handlers are called in their registration order. Therefore, the patch preserves this property. If someone feels bored, (s)he could try to identify this dependency and express it properly on callback registration. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Replace gcc variadic macro extension with C99 versionBlue Swirl2009-05-131-1/+1
| | | | Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add and use remaining #defines for PCI device IDs (Stuart Brady)aliguori2009-03-131-1/+1
| | | | | | | | | | | | | | | | | | | This patch adds and uses #defines for the remaining hardcoded PCI device IDs. It also moves definitions taken from linux/pci_ids.h into a separate header (hw/pci_ids.h), removes the 'RTL' from PCI_DEVICE_ID_REALTEK_RTL8029, and renames PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E to match Linux's definition. Changes in v2: * Don't use C99-style comments * Move definitions from linux/pci_ids.h into a separate header * Rename PCI_DEVICE_ID_FSL_E500 to PCI_DEVICE_ID_MPC8533E Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6841 c046a42c-6fe2-441c-8c8c-71466251a162
* hw: remove error handling from qemu_malloc() callers (Avi Kivity)aliguori2009-02-051-2/+0
| | | | | | | | Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
* Add and use #defines for PCI device classesblueswir12009-02-011-2/+1
| | | | | | | | | | | | | This patch adds and uses #defines for PCI device classes and subclases, using a new pci_config_set_class() function, similar to the recently added pci_config_set_vendor_id() and pci_config_set_device_id(). Change since v1: fixed compilation of hw/sun4u.c Signed-off-by: Stuart Brady <stuart.brady@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6491 c046a42c-6fe2-441c-8c8c-71466251a162
* Define PCI vendor and device IDs in pci.h (Stuart Brady)aliguori2009-01-261-6/+6
| | | | | | | | | | | | | | | This patch defines PCI vendor and device IDs in pci.h (matching those from Linux's pci_ids.h), and uses those definitions where appropriate. Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id() accessors as suggested by Anthony Liguori. Signed-off-by: Stuart Brady <stuart.brady@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6442 c046a42c-6fe2-441c-8c8c-71466251a162
* target-ppc: kill a few warningsaurel322008-12-071-0/+2
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
* hw/ppc4xx_pci.c: kill two warningsaurel322008-12-051-2/+2
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5883 c046a42c-6fe2-441c-8c8c-71466251a162
* IBM PowerPC 4xx 32-bit PCI controller emulationaurel322008-12-021-0/+419
This PCI controller can be found on a number of 4xx SoCs, including the 440EP. Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com> Acked-by: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5862 c046a42c-6fe2-441c-8c8c-71466251a162
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