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* Move CPU save/load registration to common code.pbrook2008-06-301-1/+0
* Remember the state of level-triggered interruptsaurel322008-05-041-2/+7
* PPC UIC: Remove interrupt polarity codeaurel322008-05-041-5/+1
* qemu ppc uic: Order IRQ bit number as described in the UIC documentation.aurel322008-04-281-1/+1
* More PowerPC debug print fixes - hardware emulation pass.j_mayer2007-11-241-19/+22
* Break up vl.h.pbrook2007-11-171-1/+3
* added cpu_model parameter to cpu_init()bellard2007-11-101-8/+5
* Share devices that might be useful for all PowerPC 40x & 440 implementationsj_mayer2007-10-071-0/+534
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