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* PPC: e500 pci host: Fix ATMUs register readsRudolf Marek2015-09-201-2/+2
| | | | | | | | | | There is a bug in the register mask when reading the ATMUs registers. As the result some registers cannot be read, and read is aliased to the other registers. Fix it. Signed-off-by: Rudolf Marek <rudolf.marek@sysgo.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* pci: Trivial device model conversions to realizeMarkus Armbruster2015-02-261-4/+2
| | | | | | | | | | | Convert the device models where initialization obviously can't fail. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Gonglei <arei.gonglei@huawei.com>
* PPC: e500 pci host: Add support for ATMUsAlexander Graf2015-01-071-6/+107
| | | | | | | | | | | | | | | | | | | | | | | | The e500 PCI controller has configurable windows that allow a guest OS to selectively map parts of the PCI bus space to CPU address space and to selectively map parts of the CPU address space for DMA requests into PCI visible address ranges. So far, we've simply assumed that this mapping is 1:1 and ignored it. However, the PCICSRBAR (CCSR mapped in PCI bus space) always has to live inside the first 32bits of address space. This means if we always treat all mappings as 1:1, this map will collide with our RAM map from the CPU's point of view. So this patch adds proper ATMU support which allows us to keep the PCICSRBAR below 32bits local to the PCI bus and have another, different window to PCI BARs at the upper end of address space. We leverage this on e500plat though, mpc8544ds stays virtually 1:1 like it was before, but now also goes via ATMU. With this patch, I can run guests with lots of RAM and not coincidently access MSI-X mappings while I really want to access RAM. Signed-off-by: Alexander Graf <agraf@suse.de>
* hw/pci-host/ppce500: Fix typo in vmstate definitionPeter Maydell2014-06-161-1/+1
| | | | | | | | | | | | Fix a typo in the ppce500_pci vmstate definition which meant that we were migrating the struct pci_inbound using the vmstate for pci_outbound. Fortunately the two structures have exactly the same format at the moment (four uint32_ts) so this was harmless, and we can correcting the typo without a migration compatibility break because the vmstate name doesn't go out on the wire. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: e500: implement PCI INTx routingBharat Bhushan2014-06-161-2/+23
| | | | | | | | | | | | | | | | | | | | This patch adds pci pin to irq_num routing callback. This callback is called from pci_device_route_intx_to_irq to find which pci device maps to which irq. This fix is required for pci-device passthrough using vfio. Also without this patch we gets below prints " PCI: Bug - unimplemented PCI INTx routing (e500-pcihost) qemu-system-ppc64: PCI: Bug - unimplemented PCI INTx routing (e500-pcihost) " and Legacy interrupt does not work with pci device passthrough. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> [agraf: remove double semicolon] Signed-off-by: Alexander Graf <agraf@suse.de>
* PPC: e500: some pci related cleanupBharat Bhushan2014-06-161-7/+7
| | | | | | | | - Use PCI_NUM_PINS rather than hardcoding - use "pin" wherever possible Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* savevm: Remove all the unneeded version_minimum_id_old (ppc)Juan Quintela2014-06-161-6/+3
| | | | | | | | | | | | | | | | | | | | After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Acked-by: Alexey Kardashevskiy <aik@ozlabs.ru>
* pci-host: Consistently set cannot_instantiate_with_device_add_yetMarkus Armbruster2013-12-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | Many PCI host bridges consist of a sysbus device and a PCI device. You need both for the thing to work. Arguably, these bridges should be modelled as a single, composite devices instead of pairs of seemingly independent devices you can only use together, but we're not there, yet. Since the sysbus part can't be instantiated with device_add, yet, permitting it with the PCI part is useless. We shouldn't offer useless options to the user, so let's set cannot_instantiate_with_device_add_yet for them. It's already set for Bonito, Grackle, i440FX and Raven. Document why. Set it for the others: dec-21154, e500-host-bridge, gt64120_pci, mch, pbm-pci, ppc4xx-host-bridge, sh_pci_host, u3-agp, uni-north-agp, uni-north-internal-pci, uni-north-pci, and versatile_pci_host. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* devices: Associate devices to their logical categoryMarcel Apfelbaum2013-07-291-0/+1
| | | | | | | | | The category will be used to sort the devices displayed in the command line help. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Message-id: 1375107465-25767-4-git-send-email-marcel.a@redhat.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* hw/p*: pass owner to memory_region_init* functionsPaolo Bonzini2013-07-041-6/+6
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* memory: add owner argument to initialization functionsPaolo Bonzini2013-07-041-6/+6
| | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw: move PCI bridges to hw/pci-* or hw/ARCHPaolo Bonzini2013-04-081-0/+427
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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