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* char: xilinx_uartlite: Convert to realize()Peter Crosthwaite2014-06-091-10/+14
| | | | | | | | SysBusDevice::init is depracated. Convert to Object::init and Device::realize as prescribed by QOM conventions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* char: xilinx_uartlite: Don't reset from initPeter Crosthwaite2014-06-091-1/+7
| | | | | | | | | This refresh of the device state is intended to be a reset side effect. Move it to a proper reset handler rather than do it at init time. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* serial-pci: Set prog interface field of pci config to 16550 compatibleBALATON Zoltan2014-05-211-0/+7
| | | | | | | Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
* input: sparc32 kbd: claim en-us layoutGerd Hoffmann2014-05-161-1/+1
| | | | | Reported-by: Olivier Danet <odanet@caramail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* input: sparc32 kbd: fix some key mappingsGerd Hoffmann2014-05-161-14/+16
| | | | | Reported-by: Olivier Danet <odanet@caramail.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* input: switch sparc32 kbd to new input apiGerd Hoffmann2014-05-161-59/+170
| | | | | | | | | | | | Nasty 0xe0 logic is gone. We map through QKeyCode now, giving us a nice, readable mapping table. Quick smoke test in OpenFirmware looks ok. Careful check from arch maintainers would be very nice, especially on the capslock and numlock logic. I'm not fully sure whenever I got it translated correctly and also what it is supposed to do in the first place ... Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
* Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20140515' ↵Peter Maydell2014-05-156-16/+8
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging migration/next for 20140515 # gpg: Signature made Thu 15 May 2014 02:32:25 BST using RSA key ID 5872D723 # gpg: Can't check signature: public key not found * remotes/juanquintela/tags/migration/20140515: usb: fix up post load checks migration: show average throughput when migration finishes savevm: Remove all the unneeded version_minimum_id_old (rest) savevm: Remove all the unneeded version_minimum_id_old (usb) Split ram_save_block arch_init: Simplify code for load_xbzrle() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * savevm: Remove all the unneeded version_minimum_id_old (rest)Juan Quintela2014-05-146-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After previous Peter patch, they are redundant. This way we don't assign them except when needed. Once there, there were lots of case where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (appart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* | savevm: Remove all the unneeded version_minimum_id_old (arm)Juan Quintela2014-05-135-7/+1
|/ | | | | | | | | | | | | | | | | | | | | After commit 767adce2d, they are redundant. This way we don't assign them except when needed. Once there, there were lots of cases where the ".fields" indentation was wrong: .fields = (VMStateField []) { and .fields = (VMStateField []) { Change all the combinations to: .fields = (VMStateField[]){ The biggest problem (apart from aesthetics) was that checkpatch complained when we copy&pasted the code from one place to another. Signed-off-by: Juan Quintela <quintela@redhat.com> [PMM: fixed minor conflict, corrected commit message typos] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* char/serial: Fix emptyness handlingDon Slutz2014-04-071-2/+4
| | | | | | | | | | | | | | The commit 88c1ee73d3231c74ff90bcfc084a7589670ec244 char/serial: Fix emptyness check Still causes extra NULL byte(s) to be sent. So if the fifo is empty, do not send an extra NULL byte. Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Don Slutz <dslutz@verizon.com> Message-id: 1395160174-16006-1-git-send-email-dslutz@verizon.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* pl011: fix incorrect logic to set the RXFF flagRob Herring2014-03-181-1/+1
| | | | | | | | | | The receive fifo full bit should be set when 1 character is received and the fifo is disabled or when 16 characters are in the fifo. Signed-off-by: Rob Herring <rob.herring@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1395166721-15716-4-git-send-email-robherring2@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* pl011: fix UARTRSR accesses corrupting the UARTCR valueRob Herring2014-03-181-7/+10
| | | | | | | | | | | | | | | Offset 4 is UARTRSR/UARTECR, not the UARTCR. The UARTCR would be corrupted if the UARTRSR is ever written. Fix by implementing a correct model of the UARTRSR/UARTECR register. Reads of this register simply reflect the error bits in data register. Only breaks can be triggered in QEMU. With the pl011_can_receive function, we effectively have flow control between the host and the model. Framing and parity errors simply don't make sense in the model and will never occur. Signed-off-by: Rob Herring <rob.herring@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1395166721-15716-3-git-send-email-robherring2@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* pl011: reset the fifo when enabled or disabledRob Herring2014-03-181-0/+5
| | | | | | | | | | | | | | | | | | | | Intermittent issues have been seen where no serial input occurs. It appears the pl011 gets in a state where the rx interrupt never fires because the rx interrupt only asserts when crossing the fifo trigger level. The fifo state appears to get out of sync when the pl011 is re-configured. This combined with the rx timeout interrupt not being modeled results in no more rx interrupts. Disabling the fifo is the recommended way to clear the tx fifo in the TRM (section 3.3.8). The behavior in this case for the rx fifo is undefined in the TRM, but having fifo contents to be maintained during configuration changes is not likely expected behavior. Reseting the fifo state when the fifo size is changed is the simplest solution. Signed-off-by: Rob Herring <rob.herring@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1395166721-15716-2-git-send-email-robherring2@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* s390x/sclpconsole-lm: Fix and simplify irq setupChristian Borntraeger2014-03-171-23/+4
| | | | | | | | | | | | | | | | | | | | | | | valgrind complains about a memory leak in irq setup of sclpconsole: ==42117== 8 bytes in 1 blocks are definitely lost in loss record 89of 833 ==42117== at 0x4031AFE: malloc (vg_replace_malloc.c:292) ==42117== by 0x8022F855: malloc_and_trace (vl.c:2715) ==42117== by 0x4145569: g_malloc (in /usr/lib64/libglib-2.0.so.0.3400.2) ==42117== by 0x800F696D: qemu_extend_irqs (irq.c:51) ==42117== by 0x800F6AF7: qemu_allocate_irqs (irq.c:68) ==42117== by 0x800F5685: console_init (sclpconsole.c:235) ==42117== by 0x80297C79: event_realize (event-facility.c:386) ==42117== by 0x80105071: device_set_realized (qdev.c:693) ==42117== by 0x801CDC4B: property_set_bool (object.c:1337) ==42117== by 0x801CBD7F: object_property_set (object.c:819) [...] We dont need the indirection of an qemu irq to inject an slcp interrupt. Fixes a valgrind error and makes the code simpler. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
* s390x/sclpconsole: Fix and simplify interrupt injectionChristian Borntraeger2014-03-171-24/+6
| | | | | | | | | | | | | | | | | | | | | | | valgrind complains about a memory leak in irq setup of sclpconsole: ==42117== 8 bytes in 1 blocks are definitely lost in loss record 89 of 833 ==42117== at 0x4031AFE: malloc (vg_replace_malloc.c:292) ==42117== by 0x8022F855: malloc_and_trace (vl.c:2715) ==42117== by 0x4145569: g_malloc (in /usr/lib64/libglib-2.0.so.0.3400.2) ==42117== by 0x800F696D: qemu_extend_irqs (irq.c:51) ==42117== by 0x800F6AF7: qemu_allocate_irqs (irq.c:68) ==42117== by 0x800F5685: console_init (sclpconsole.c:235) ==42117== by 0x80297C79: event_realize (event-facility.c:386) ==42117== by 0x80105071: device_set_realized (qdev.c:693) ==42117== by 0x801CDC4B: property_set_bool (object.c:1337) ==42117== by 0x801CBD7F: object_property_set (object.c:819) [...] Turns out that we actually dont need the indirection, so trigger the sclp interrupt directly. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Heinz Graalfs <graalfs@linux.vnet.ibm.com>
* virtio-console: Fix VIRTIO_CONSOLE() cast macroAndreas Färber2014-03-131-18/+6
| | | | | | | | | | | | | | | Commit 0399a3819b27083ba69b88a9baa9025facab85bd (virtio-console: QOM cast cleanup for VirtConsole) broke virtserialport since it shares functions and state struct with virtconsole. Let virtconsole inherit from virtserialport, and use virtserialport type for casting. Note that virtio-serial-port is the abstract base type in virtio-serial-bus.c, whereas virtserialport is the user-instantiatable type in virtio-console.c. Therefore using TYPE_VIRTIO_CONSOLE_SERIAL_PORT. Reported-by: Richard W.M. Jones <rjones@redhat.com> Acked-by: Richard W.M. Jones <rjones@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* virtio-serial-port: Convert to QOM realize/unrealizeAndreas Färber2014-03-132-40/+39
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* virtio-console: QOM cast cleanup for VirtConsoleAndreas Färber2014-03-131-13/+20
| | | | | | Introduce type constant, cast macro and rename parent field. Signed-off-by: Andreas Färber <afaerber@suse.de>
* Merge remote-tracking branch 'remotes/afaerber/tags/qom-devices-for-peter' ↵Peter Maydell2014-02-208-884/+15
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging QOM infrastructure fixes and device conversions * QTest cleanups and test cases for PCI NICs * NAND fix for "info qtree" * Cleanup and extension of QOM machine tests * IndustryPack test cases and conversion to QOM realize * I2C cleanups * Cleanups of legacy qdev properties # gpg: Signature made Mon 17 Feb 2014 22:15:37 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-devices-for-peter: (49 commits) qtest: Include system headers before user headers qapi: Refine human printing of sizes qdev: Use QAPI type names for properties qdev: Add enum property types to QAPI schema block: Handle "rechs" and "large" translation options qdev: Remove hex8/32/64 property types qdev: Remove most legacy printers qdev: Use human mode in "info qtree" qapi: Add human mode to StringOutputVisitor qdev: Inline qdev_prop_parse() qdev: Legacy properties are just strings qdev: Legacy properties are now read-only qdev: Remove legacy parsers for hex8/32/64 qdev: Sizes are now parsed by StringInputVisitor qapi: Add size parser to StringInputVisitor qtest: Don't segfault with invalid -qtest option ipack: Move IndustryPack out of hw/char/ ipoctal232: QOM parent field cleanup ipack: QOM parent field cleanup for IPackDevice ipack: QOM parent field cleanup for IPackBus ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * qdev: Remove hex8/32/64 property typesPaolo Bonzini2014-02-143-4/+4
| | | | | | | | | | | | | | | | | | Replace them with uint8/32/64. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ipack: Move IndustryPack out of hw/char/Andreas Färber2014-02-145-881/+2
| | | | | | | | | | | | | | | | | | Move the header defining an IPackBus and IPackDevice base class into a new include/ directory and move their implementation and a PCI-IndustryPack bridge out of hw/char/ directory into a new hw/ipack/. Acked-by: Alberto Garcia <agarcia@igalia.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ipoctal232: QOM parent field cleanupAndreas Färber2014-02-141-4/+6
| | | | | | | | | | | | | | Clean up accesses to IPOctalState::dev field and rename it. Acked-by: Alberto Garcia <agarcia@igalia.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ipack: QOM parent field cleanup for IPackDeviceAndreas Färber2014-02-141-1/+4
| | | | | | | | | | | | | | Rename the IPackDevice::qdev field to avoid accidental use. Acked-by: Alberto Garcia <agarcia@igalia.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ipack: QOM parent field cleanup for IPackBusAndreas Färber2014-02-141-1/+3
| | | | | | | | | | | | | | Clean up the only user of IPackBus::qbus field and rename it. Acked-by: Alberto Garcia <agarcia@igalia.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
| * ipack: Convert to QOM realizeAndreas Färber2014-02-143-26/+29
| | | | | | | | | | Acked-by: Alberto Garcia <agarcia@igalia.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* | char/serial: Fix emptyness checkPeter Crosthwaite2014-02-151-1/+1
|/ | | | | | | | | | This was guarding against a full fifo rather than an empty fifo when popping. Fix. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Martin Kletzander <mkletzan@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* lm32_uart/lm32_juart: use qemu_chr_fe_write_all()Michael Walle2014-02-042-2/+2
| | | | | | | | qemu_chr_fe_write() may return EAGAIN. Therefore, use qemu_chr_fe_write_all(). Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* milkymist-uart: use qemu_chr_fe_write_all() instead of qemu_chr_fe_write()Antony Pavlov2014-02-041-1/+1
| | | | | | | | | | | | | | qemu_chr_fe_write() is capable of returning 0 to indicate EAGAIN (and friends) and we don't handle this. Just change it to qemu_chr_fe_write_all() to fix. Reported-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch 'mjt/trivial-patches' into stagingAnthony Liguori2014-01-091-4/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * mjt/trivial-patches: acpi unit-test: Remove temporary disk after test mainstone: Fix duplicate array values for key 'space' pxa27x: Add 'const' attribute to keyboard maps pxa27x: Reduce size of keyboard matrix mapping doc: Mention chardev:id in available devices for -serial configure: Python tests must be done before help message configure: Rewrite code for help message fix -boot strict regressed in commit 6ef4716 vl: make boot_strict variable static (not used outside vl.c) x86: only allow real mode to access 32bit without LMA linux-user: Use macro TARGET_NSIG_WORDS where possible exynos4210: Use macro ARRAY_SIZE where possible ui/cocoa: Use macro ARRAY_SIZE where possible misc: Use macro ARRAY_SIZE where possible openrisc: Fix spelling in comment (transaltion -> translation) hw/arm/highbank: Simplify code (memory region in device state) Message-id: 1388182050-10270-1-git-send-email-mjt@msgid.tls.msk.ru Signed-off-by: Anthony Liguori <aliguori@amazon.com>
| * exynos4210: Use macro ARRAY_SIZE where possibleStefan Weil2013-12-231-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | This improves readability and simplifies the code. Cc: Dmitry Solodkiy <d.solodkiy@samsung.com> Cc: Evgeny Voevodin <e.voevodin@samsung.com> Cc: Igor Mitsyanko <i.mitsyanko@gmail.com> Cc: Maksim Kozlov <m.kozlov@samsung.com> Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* | char/cadence_uart: Implement Tx flow controlPeter Crosthwaite2014-01-081-2/+29
| | | | | | | | | | | | | | | | | | | | If the UART back-end blocks, buffer in the Tx FIFO to try again later. This stops the IO-thread busy waiting on char back-ends (which causes all sorts of performance problems). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Delete redundant rx rst logicPeter Crosthwaite2014-01-081-2/+0
| | | | | | | | | | | | | | | | uart_rx_reset() called immediately above already does this. Remove. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 05e30826496cf2579084ed801ac0b2c0d0a3071f.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Use the TX fifo for transmissionPeter Crosthwaite2014-01-081-1/+16
| | | | | | | | | | | | | | | | | | Populate the TxFIFO with the Tx data before sending. Prepares support for proper Tx flow control implementation. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: bdf7f8af2ef02839bea18665701bc2612f7baa6f.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Fix can_receive logicPeter Crosthwaite2014-01-081-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The can_receive logic was only taking into account the RxFIFO occupancy. RxFIFO population is only used for the echo and normal modes however. Improve the logic to correctly return the true number of receivable characters based on the current mode: Normal mode: RxFIFO vacancy. Remote loopback: TxFIFO vacancy. Echo mode: The min of the TxFIFO and RxFIFO vacancies. Local Loopback: Return non-zero (to implement droppage) Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 36a58440c9ca5080151e95765c2c81342de8a8df.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Remove TX timer & add TX FIFO statePeter Crosthwaite2014-01-081-31/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This tx timer implementation is flawed. Despite the controller attempting to time the guest visable assertion of the TX-empty status bit (and corresponding interrupt) the controller is still transmitting characters instantaneously. There is also no sense of multiple character delay. The only side effect of this timer is assertion of tx-empty status. So just remove the timer completely and hold tx-empty as permanently asserted (its reset status). This matches the actual behaviour of instantaneous transmission. While we are VMSD version bumping, add the tx_fifo as device state to prepare for upcomming TxFIFO flow control. Implement the interrupt generation logic for the TxFIFO occupancy. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 7a208a7eb8d79d6429fe28b1396c3104371807b2.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Define Missing SR/ISR fieldsPeter Crosthwaite2014-01-081-0/+4
| | | | | | | | | | | | | | | | | | | | Some (interrupt) status register bits relating to the TxFIFO path were not defined. Define them. This prepares support for proper Tx data path flow control. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 2068b963f0af8cc834c353944e9fa816d950b163.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Simplify status generationPeter Crosthwaite2014-01-081-25/+8
| | | | | | | | | | | | | | | | | | | | | | The status register bits are always pure functions of other device state. Move the generation of these bits to the update_status() function to simplify. Makes developing much easier as theres now no need to recheck status bits on all the changes to rx/tx fifo state. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 321994929f789096975104f99c55732774be4cae.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: s/r_fifo/rx_fifoPeter Crosthwaite2014-01-081-4/+4
| | | | | | | | | | | | | | | | | | Rename this field to match the many other uses of "rx". Xilinx docmentation (UG585) also refers to this as "RxFIFO". Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 7386d7cee0ea175f7e53ed5ff045265528d34e32.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Fix reset.Peter Crosthwaite2014-01-081-3/+4
| | | | | | | | | | | | | | | | | | Don't reset the uart as an init step. Register the reset function as a proper reset fn instead. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: d82cd2e65e5a6f8b6deeecb6cced61f0bf3f8c89.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Add missing uart_update_statePeter Crosthwaite2014-01-081-0/+1
| | | | | | | | | | | | | | | | | | | | This should be rechecked on bus write accesses as such accesses may change the underlying state that generates the interrupt. Particular relevant for when the guest touches the interrupt status or mask. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1c250cd61b7b8de492fbc8b79b8370958a56d83b.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* | char/cadence_uart: Mark struct fields as public/privatePeter Crosthwaite2014-01-081-0/+2
|/ | | | | | | | As per current QOM conventions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: a1e31bd62e9709ffb9b3efc6c120f83f30b7a660.1388626249.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/digic: add UART supportAntony Pavlov2013-12-172-0/+196
| | | | | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 1387188908-754-5-git-send-email-antonynpavlov@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Merge remote-tracking branch 'bonzini/virtio' into stagingAnthony Liguori2013-12-131-16/+17
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | # By Andreas Färber (18) and Paolo Bonzini (12) # Via Paolo Bonzini * bonzini/virtio: (30 commits) virtio: Convert exit to unrealize virtio: Complete converting VirtioDevice to QOM realize virtio-scsi: Convert to QOM realize virtio-rng: Convert to QOM realize virtio-balloon: Convert to QOM realize virtio-net: Convert to QOM realize virtio-serial: Convert to QOM realize virtio-blk: Convert to QOM realize virtio-9p: Convert to QOM realize virtio: Start converting VirtioDevice to QOM realize virtio-scsi: QOM realize preparations virtio-rng: QOM realize preparations virtio-balloon: QOM realize preparations virtio-net: QOM realize preparations virtio-serial: QOM realize preparations virtio-blk: QOM realize preparations virtio-9p: QOM realize preparations virtio-blk-dataplane: Improve error reporting virtio-pci: add device_unplugged callback virtio-rng: switch exit callback to VirtioDeviceClass ...
| * virtio: Convert exit to unrealizeAndreas Färber2013-12-091-4/+5
| | | | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * virtio-serial: Convert to QOM realizeAndreas Färber2013-12-091-8/+8
| | | | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * virtio-serial: QOM realize preparationsAndreas Färber2013-12-091-5/+7
| | | | | | | | | | Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * virtio-serial: switch exit callback to VirtioDeviceClassPaolo Bonzini2013-12-091-6/+4
| | | | | | | | | | | | | | | | | | This ensures hot-unplug is handled properly by the proxy, and avoids leaking bus_name which is freed by virtio_device_exit. Cc: qemu-stable@nongnu.org Acked-by: Andreas Faerber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | misc: Replace 'struct QEMUTimer' by 'QEMUTimer'Stefan Weil2013-12-021-2/+2
|/ | | | | | | | Most code already used QEMUTimer without the redundant 'struct' keyword. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* spapr: add vio-bus devices to categoriesAlexey Kardashevskiy2013-11-081-0/+1
| | | | | | | | | | | In order to get devices appear in output of "./qemu-system-ppc64 -device ?", they must be assigned to one of DEVICE_CATEGORY_XXXX. This puts VIO devices classes to corresponding categories. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Alexander Graf <agraf@suse.de>
* milkymist-uart: Use Device::realize instead of SysBusDevice::initAntony Pavlov2013-11-051-10/+14
| | | | | | | | | | Use of SysBusDevice::init is deprecated. Use Device::realize instead. Also introduce TypeInfo::instance_init milkymist_uart_init(). Reported-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
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