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* hw, net: "net_client_type" -> "NetClientOptionsKind" (qapi-generated)Laszlo Ersek2012-07-231-1/+1
| | | | | | | NET_CLIENT_TYPE_ -> NET_CLIENT_OPTIONS_KIND_ Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* hw/cadence_gem: Make rx_desc_addr and tx_desc_addr uint32_tPeter Maydell2012-07-041-2/+2
| | | | | | | | | | | | Make the state fields rx_desc_addr and tx_desc_addr uint32_t; this matches the VMStateDescription, and also conforms to how hardware works: the registers don't magically become larger if the device is attached to a CPU with a larger physical address size. It also fixes a compile failure if the target_phys_addr_t type is changed to 64 bits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
* cadence_gem: avoid stack-writing buffer-overrunJim Meyering2012-06-191-1/+1
| | | | | | | | | | | | | Use sizeof(rxbuf)-size (not sizeof(rxbuf-size)) as the number of bytes to clear. The latter would always clear 4 or 8 bytes, possibly writing beyond the end of that stack buffer. Alternatively, depending on the value of the "size" parameter, it could fail to initialize the end of "rxbuf". Spotted by coverity. Signed-off-by: Jim Meyering <meyering@redhat.com> Reviewed-by: Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* cadence_gem: initial version of device modelPeter A. G. Crosthwaite2012-03-071-0/+1233
Device model for cadence gem ethernet controller. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: John Linn <john.linn@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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