summaryrefslogtreecommitdiffstats
path: root/hw/arm
Commit message (Collapse)AuthorAgeFilesLines
* arm: Remove ELF_MACHINE from cpu.hPeter Crosthwaite2015-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | The only generic code relying on this is linux-user. Linux user already has a lot of #ifdef TARGET_ customisation so instead, define ELF_ARCH as either EM_ARM or EM_AARCH64 appropriately. The armv7m bootloader can just pass EM_ARM directly, as that is architecture specific code. Note that arm_boot already has its own logic selecting an arm specific elf machine so this makes V7M more consistent with arm_boot. This removes another architecture specific definition from the global namespace. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Acked-By: Riku Voipio <riku.voipio@linaro.org> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/arm/virt-acpi-build: Fix wrong size of flash in ACPI tableShannon Zhao2015-09-241-1/+1
| | | | | | | | | | | | | | | | | While virt machine creates two flash devices with total size 0x08000000, the ACPI table generation code was wrongly using this total size as the size of each flash device, so it would overlap other MMIO spaces. Make each device entry in the table half the total; this brings the ACPI table into line with the code which generates the device tree and which creates the flash devices themselves. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Wei Huang <wei@redhat.com> Tested-by: Graeme Gregory <graeme.gregory@linaro.org> Message-id: 1442455041-6596-1-git-send-email-shannon.zhao@linaro.org [PMM: edited commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Add gic-version option to virt machinePavel Fedin2015-09-242-45/+133
| | | | | | | | | | | | | | | | | | | Add gic_version to VirtMachineState, set it to value of the option and pass it around where necessary. Instantiate devices and fdt nodes according to the choice. max_cpus for virt machine increased to 123 (calculated from redistributor space available in the memory map). GICv2 compatibility check happens inside arm_gic_common_realize(). ITS region is added to the memory map too, however currently it not used, just reserved. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Tested-by: Ashok kumar <ashoks@broadcom.com> [PMM: Added missing cpu_to_le* calls, thanks to Shannon Zhao] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Revert use of DEFINE_MACHINE() for registrations of multiple machinesAndreas Färber2015-09-199-44/+252
| | | | | | | | | The script used for converting from QEMUMachine had used one DEFINE_MACHINE() per machine registered. In cases where multiple machines are registered from one source file, avoid the excessive generation of module init functions by reverting this unrolling. Signed-off-by: Andreas Färber <afaerber@suse.de>
* Use DEFINE_MACHINE() to register all machinesEduardo Habkost2015-09-1923-297/+194
| | | | | | | | | Convert all machines to use DEFINE_MACHINE() instead of QEMUMachine automatically using a script. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Style cleanups, convert imx25_pdk machine] Signed-off-by: Andreas Färber <afaerber@suse.de>
* exynos4: Declare each QEMUMachine as a separate variableEduardo Habkost2015-09-191-17/+14
| | | | | | | | | This will make the code follow the same pattern used for other machines, and will make it easier to automatically convert the code to be QOM-based. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* exynos4: Use MachineClass instead of exynos4_machines arrayEduardo Habkost2015-09-191-1/+3
| | | | | | | | We don't need a QEMUMachine array to query max_cpus, if we can get the corresponding MachineClass. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* exynos4: Use EXYNOS4210_NCPUS instead of max_cpus on error messageEduardo Habkost2015-09-191-2/+1
| | | | | | | | The code is checking smp_cpus against EXYNOS4210_NCPUS, not against max_cpus, so use EXYNOS4210_NCPUS in the error message for consistency. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
* machine: Set MachineClass::name automaticallyEduardo Habkost2015-09-192-9/+3
| | | | | | | | | | | | | Now all TYPE_MACHINE subclasses use MACHINE_TYPE_NAME to generate the class name. So instead of requiring each subclass to set MachineClass::name manually, we can now set it automatically at the TYPE_MACHINE class_base_init() function. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> [AF/ehabkost: Updated for s390-ccw machines] [AF: Cleanup of intermediate virt and vexpress name handling] Signed-off-by: Andreas Färber <afaerber@suse.de>
* arm: Rename virt machine class to use MACHINE_TYPE_NAMEEduardo Habkost2015-09-191-2/+3
| | | | | | | | | | Machine class names should use the "-machine" suffix to allow class-name-based machine class lookup to work. Rename the arm virt machine class using the MACHINE_TYPE_NAME macro. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
* vexpress: Rename machine classes to use MACHINE_TYPE_NAMEEduardo Habkost2015-09-191-4/+6
| | | | | | | | | | | Machine class names should use the "-machine" suffix to allow class-name-based machine class lookup to work. Rename the vexpress machine classes using the MACHINE_TYPE_NAME macro. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [AF: Introduce VEXPRESS_*_MACHINE_NAME] Signed-off-by: Andreas Färber <afaerber@suse.de>
* vexpress: Don't set name on abstract classEduardo Habkost2015-09-191-1/+0
| | | | | | | | | | The MachineClass::name field won't be ever be used on TYPE_VEXPRESS, as it is an abstract class and the machine class lookup code explicitly skips abstract classes. We can remove it to make the code simpler. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Andreas Färber <afaerber@suse.de>
* Fix bad error handling after memory_region_init_ram()Markus Armbruster2015-09-1819-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Symptom: $ qemu-system-x86_64 -m 10000000 Unexpected error in ram_block_add() at /work/armbru/qemu/exec.c:1456: upstream-qemu: cannot set up guest memory 'pc.ram': Cannot allocate memory Aborted (core dumped) Root cause: commit ef701d7 screwed up handling of out-of-memory conditions. Before the commit, we report the error and exit(1), in one place, ram_block_add(). The commit lifts the error handling up the call chain some, to three places. Fine. Except it uses &error_abort in these places, changing the behavior from exit(1) to abort(), and thus undoing the work of commit 3922825 "exec: Don't abort when we can't allocate guest memory". The three places are: * memory_region_init_ram() Commit 4994653 (right after commit ef701d7) lifted the error handling further, through memory_region_init_ram(), multiplying the incorrect use of &error_abort. Later on, imitation of existing (bad) code may have created more. * memory_region_init_ram_ptr() The &error_abort is still there. * memory_region_init_rom_device() Doesn't need fixing, because commit 33e0eb5 (soon after commit ef701d7) lifted the error handling further, and in the process changed it from &error_abort to passing it up the call chain. Correct, because the callers are realize() methods. Fix the error handling after memory_region_init_ram() with a Coccinelle semantic patch: @r@ expression mr, owner, name, size, err; position p; @@ memory_region_init_ram(mr, owner, name, size, ( - &error_abort + &error_fatal | err@p ) ); @script:python@ p << r.p; @@ print "%s:%s:%s" % (p[0].file, p[0].line, p[0].column) When the last argument is &error_abort, it gets replaced by &error_fatal. This is the fix. If the last argument is anything else, its position is reported. This lets us check the fix is complete. Four positions get reported: * ram_backend_memory_alloc() Error is passed up the call chain, ultimately through user_creatable_complete(). As far as I can tell, it's callers all handle the error sanely. * fsl_imx25_realize(), fsl_imx31_realize(), dp8393x_realize() DeviceClass.realize() methods, errors handled sanely further up the call chain. We're good. Test case again behaves: $ qemu-system-x86_64 -m 10000000 qemu-system-x86_64: cannot set up guest memory 'pc.ram': Cannot allocate memory [Exit 1 ] The next commits will repair the rest of commit ef701d7's damage. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1441983105-26376-3-git-send-email-armbru@redhat.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
* i.MX: Add GPIO devices to i.MX25 SOCJean-Christophe Dubois2015-09-141-0/+29
| | | | | | | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 2eb129ba8713aedfe877eaa3d8de80061d880fbb.1441828793.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Add GPIO devices to i.MX31 SOCJean-Christophe Dubois2015-09-141-0/+30
| | | | | | | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 60b67c9a8b948159f4b4163ead86fbf701c011c6.1441828793.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* xlnx-zynqmp: Remove unnecessary brackets around error messagesAlistair Francis2015-09-141-5/+5
| | | | | | | | | | | The errp and err variable have unnecessary brackets around them, so remove the brackets. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 9900393572b63f2ec3d68785ca98193d81e0ac71.1441758563.git.alistair.francis@xilinx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/spitz: Remove meaningless blank PropertyShannon Zhao2015-09-111-5/+0
| | | | | | Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* maint: remove double semicolons in many filesDaniel P. Berrange2015-09-111-2/+2
| | | | | | | | | | | | | | | A number of source files have statements accidentally terminated by a double semicolon - eg 'foo = bar;;'. This is harmless but a mistake none the less. The tcg/ia64/tcg-target.c file is whitelisted because it has valid use of ';;' in a comment containing assembly code. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* xlnx-zynqmp: Connect the sysbus AHCI to ZynqMPAlistair Francis2015-09-081-0/+18
| | | | | | | | | Connect the Sysbus AHCI device to ZynqMP. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sai Pavan Boddu <saipava@xilinx.com> [PMM: removed unnecessary brackets in error_propagate call] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* xlnx-zynqmp.c: Convert some of the error_propagate() calls to error_abortAlistair Francis2015-09-081-12/+2
| | | | | | | | | Convert all of the non-realize error_propagate() calls into error_abort calls as they shouldn't be user visible failure cases. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Enable TZ extensions on the GIC if we are using themPeter Maydell2015-09-081-2/+5
| | | | | | | | | | | | If we're creating a board with support for TrustZone, then enable it on the GIC model as well as on the CPUs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-7-git-send-email-peter.maydell@linaro.org
* hw/arm/virt: Default to not providing TrustZone supportPeter Maydell2015-09-081-2/+5
| | | | | | | | | | | | | | | | | | | | Switch the default for the 'virt' board to not providing TrustZone support in either the CPU or the GIC. This is primarily for the benefit of UEFI, which currently assumes there is no TrustZone support, and does not set the GIC up correctly if it is TZ-aware. It also means the board is consistent about its behaviour whether we're using KVM or TCG (KVM never has TrustZone support). If TrustZone support is required (for instance for running test suites or TZ-aware firmware) it can be enabled with the "-machine secure=on" command line option. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-6-git-send-email-peter.maydell@linaro.org
* hw/arm: new interface for devices which need to behave differently for ↵Peter Maydell2015-09-081-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | kernel boot For ARM we have a little minimalist bootloader in hw/arm/boot.c which takes the place of firmware if we're directly booting a Linux kernel. Unfortunately a few devices need special case handling in this situation to do the initialization which on real hardware would be done by firmware. (In particular if we're booting a kernel in NonSecure state then we need to make a TZ-aware GIC put all its interrupts into Group 1, or the guest will be unable to use them.) Create a new QOM interface which can be implemented by devices which need to do something different from their default reset behaviour. The callback will be called after machine initialization and before first reset. Suggested-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1441383782-24378-3-git-send-email-peter.maydell@linaro.org
* arm/virt: Add full-sized CPU affinity handlingPavel Fedin2015-09-071-2/+32
| | | | | | | | | | | | At least with KVM, currently there's no reason why QEMU would not be capable of handling Aff3 != 0. This commit fixes up FDT creation in such a case. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Message-id: eef5a86e6d9a313780dbc23b35fcb65df42a3e9e.1441366248.git.p.fedin@samsung.com [PMM: folded two overlong lines] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Add i2C devices to i.MX31 SOCJean-Christophe Dubois2015-09-071-0/+30
| | | | | | | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: fb20e6bf5cf946c4530b2cfb55c7e37f5a0fc051.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Add the i.MX25 PDK platformJean-Christophe Dubois2015-09-072-1/+160
| | | | | | | | | | Tested by booting a minimal Linux system on the emulated platform Tested by booting the Xvisor hypervisor on the emulated platform Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: d27347300d253509d921bc27a6d0a14db877478b.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Add SOC support for i.MX25Jean-Christophe Dubois2015-09-072-0/+274
| | | | | | | | | | | | | | | | | For now we support the following devices: * CPU: ARM926 * Interrupt Controller: AVIC * CCM * UART x 5 * EPIT x 2 * GPT x 4 * FEC * I2C x 3 Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 62218bfa90f9101f79098e768c3d58bd92dcb7f3.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: KZM: use standalone i.MX31 SOC supportJean-Christophe Dubois2015-09-071-103/+102
| | | | | | | | | | | | | | | | | | Convert the KZM board to use the i.MX31 SoC defintition instead of redefining the entire SoC on the machine level. Major rewrite of the machine init code. While touching the memory map comment de-indent to the correct level of indentation. This obsoletes the legacy i.MX device device creation helpers which are removed. Tested by booting a minimal Linux system on the emulated platform Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-id: 5e783561f092e1c939562fdff001f1ab1194b07f.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Add SOC support for i.MX31Jean-Christophe Dubois2015-09-072-1/+218
| | | | | | | | | | | | | | | For now we support the following devices: * CPU: ARM1136 * Interrupt Controller: AVIC * CCM * UART x 2 * EPIT x 2 * GPT Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: f146d819594e41568daec42a1d0f440cdfe3df76.1441057361.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Add high MMIO PCI region, 512G in sizePavel Fedin2015-09-072-9/+74
| | | | | | | | | | | | | | | | | This large region is necessary for some devices like ivshmem and video cards 32-bit kernels can be built without LPAE support. In this case such a kernel will not be able to use PCI controller which has windows in high addresses. In order to work around the problem, "highmem" option is introduced. It defaults to on on, but can be manually set to off in order to be able to run those old 32-bit guests. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> [PMM: Added missing ULL suffixes and a comment to the a15memmap[] entry] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* smbios: implement smbios support for mach-virtWei Huang2015-09-071-0/+26
| | | | | | | | | | | | | | | | This patch generates smbios tables for ARM mach-virt. Also add CONFIG_SMBIOS=y for ARM default config. Acked-by: Gabriel Somlo <somlo@cmu.edu> Tested-by: Gabriel Somlo <somlo@cmu.edu> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Wei Huang <wei@redhat.com> Message-id: 1440615870-9518-3-git-send-email-wei@redhat.com [PMM: Added missing braces around an if().] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm: Use g_new() & friends where that makes obvious senseMarkus Armbruster2015-09-075-38/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Coccinelle semantic patch: @@ type T; @@ -g_malloc(sizeof(T)) +g_new(T, 1) @@ type T; @@ -g_try_malloc(sizeof(T)) +g_try_new(T, 1) @@ type T; @@ -g_malloc0(sizeof(T)) +g_new0(T, 1) @@ type T; @@ -g_try_malloc0(sizeof(T)) +g_try_new0(T, 1) @@ type T; expression n; @@ -g_malloc(sizeof(T) * (n)) +g_new(T, n) @@ type T; expression n; @@ -g_try_malloc(sizeof(T) * (n)) +g_try_new(T, n) @@ type T; expression n; @@ -g_malloc0(sizeof(T) * (n)) +g_new0(T, n) @@ type T; expression n; @@ -g_try_malloc0(sizeof(T) * (n)) +g_try_new0(T, n) @@ type T; expression p, n; @@ -g_realloc(p, sizeof(T) * (n)) +g_renew(T, p, n) @@ type T; expression p, n; @@ -g_try_realloc(p, sizeof(T) * (n)) +g_try_renew(T, p, n) @@ type T; expression n; @@ -(T *)g_new(T, n) +g_new(T, n) @@ type T; expression n; @@ -(T *)g_new0(T, n) +g_new0(T, n) @@ type T; expression p, n; @@ -(T *)g_renew(T, p, n) +g_renew(T, p, n) Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1440524394-15640-1-git-send-email-armbru@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* xlnx-zynqmp: Connect the four OCM banksAlistair Francis2015-08-251-0/+15
| | | | | | | | | | | The Xilinx EP108 has four separate OCM banks which are located adjacent to each other. This patch adds the four banks to the ZynqMP SoC. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: afa6ba31163a5d541a0bef4b0dc11f2597e0c495.1436813543.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Wire up secure timer interruptPeter Maydell2015-08-131-13/+15
| | | | | | | | | | | | | Wire up the secure timer interrupt. Since we've defined that the plain old physical timer is the NS timer, we can drop the now-out-of-date comment about QEMU not having TZ. Use a data-driven loop to wire up the timer interrupts, since we now have four of them and the code is the same for each. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1437047249-2357-4-git-send-email-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* Introduce gic_class_name() instead of repeating conditionPavel Fedin2015-08-131-4/+3
| | | | | | | | | | This small inline returns correct GIC class name depending on whether we use KVM acceleration or not. Avoids duplicating the condition everywhere. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 4f26901be9b844b563673ce3ad08eeedbb7a7132.1438758065.git.p.fedin@samsung.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Split CCM emulator in a header file and a source fileJean-Christophe Dubois2015-08-131-1/+1
| | | | | | | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: b1d6f990229b2608bbaba24f4ff359571c0b07da.1437080501.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* i.MX: Split AVIC emulator in a header file and a source fileJean-Christophe Dubois2015-08-131-1/+2
| | | | | | | Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 06829257e845d693be05c7d491134313c1615d1a.1437080501.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Connect the Hypervisor timerEdgar E. Iglesias2015-08-131-0/+4
| | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1436791864-4582-8-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt: Replace magic IRQ constants with macrosEdgar E. Iglesias2015-08-131-3/+6
| | | | | | | | | | Replace magic constants with macros from hw/arm/virt.h and hw/intc/arm_gic_common.h. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1436791864-4582-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* musicpal: Drop eth_can_receiveFam Zheng2015-07-201-6/+0
| | | | | | | | | True is the default. Signed-off-by: Fam Zheng <famz@redhat.com> Reviewed-by: Jason Wang <jasowang@redhat.com> Message-id: 1435734647-8371-2-git-send-email-famz@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* arm/xlnx-zynqmp: fix memory leakGonglei2015-07-161-0/+2
| | | | | | | | fix CID 1311372. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Message-Id: <1436489490-236-4-git-send-email-arei.gonglei@huawei.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* hw/arm/boot: Increase fdt alignmentAlexander Graf2015-07-151-6/+22
| | | | | | | | | | | | | | | | | | | | The Linux kernel on aarch64 creates a page table entry at early bootup that spans the 2MB range on memory spanning the fdt start address: [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ] This means that when our current 4k alignment happens to fall at the end of the aligned region, Linux tries to access memory that is not mapped. The easy fix is to instead increase the alignment to 2MB, making Linux's logic always succeed. We leave the existing 4k alignment for 32bit kernels to not cause any regressions due to space constraints. Reported-by: Andreas Schwab <schwab@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/boot: Use cpu_set_pc()Peter Crosthwaite2015-07-091-13/+11
| | | | | | | | | | | | Use cpu_set_pc() across the board for setting program counters. This removes instances of system level code having to reach into the CPU env. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> [AF: Avoid repeated casts with local variables] Signed-off-by: Andreas Färber <afaerber@suse.de>
* hw/arm/virt: Make block devices default to virtioPeter Maydell2015-06-261-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now we have virtio-pci, we can make the virt board's default block device type be IF_VIRTIO. This allows users to use simplified command lines that don't have to explicitly create virtio-pci-blk devices; the -hda &c very short options now also work. This means we also need to set no_cdrom to avoid getting a default cdrom device -- this is needed because the virtio-blk device will fail if it is connected to a block backend with no media, which is what the default cdrom device typically is. Providing a cdrom with media via -cdrom will succeed, but silently create a device with non-removable medium. this is probably not really what the user wants, but is the best we can do now. Note that this change means that some command lines which used to work (by accident) will stop working. Where a drive was connected manually to a device but without 'if=none' being specified, we used to treat this as an IDE drive, which we would then not autoplug because the board doesn't support IDE. Now we will treat it as a virtio disk and autoplug it, which means the attempt to use the drive manually will fail: qemu-system-arm: -drive file=img.qcow2,id=foo: Drive 'foo' is already in use because it has been automatically connected to another device (did you need 'if=none' in the drive options?) The command line will have to be changed to include 'if=none', as the error message suggests. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435068107-12594-4-git-send-email-peter.maydell@linaro.org
* hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT tableShannon Zhao2015-06-261-0/+11
| | | | | | | | | | | | Add GICv2m description in ACPI MADT table, so guest can use MSI when booting with ACPI. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Tested-by: Andrew Jones <drjones@redhat.com> Message-id: 1434676210-2276-1-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/virt-acpi-build: Fix table revision and some commentsShannon Zhao2015-06-261-5/+6
| | | | | | | | | | The table revision is not the ACPI spec version. Fix the wrong revision and also some comments. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1433820378-8336-1-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm: xlnx-zynqmp: Add 2xCortexR5 CPUsPeter Crosthwaite2015-06-191-0/+34
| | | | | | | | | | Add the 2xCortexR5 CPUs to zynqmp board. They are powered off on reset (this is true of real hardware) by default or selectable as the boot processor. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: da34128c73ca13fc4f8c3293e1a33d1e1e345655.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm: xlnx-zynqmp: Add boot-cpu propertyPeter Crosthwaite2015-06-192-2/+19
| | | | | | | | | | | Add a string property that specifies the primary boot cpu. All CPUs except the one selected will start-powered-off. This allows for elf boots on any CPU, which prepares support for booting R5 elfs directly on the R5 processors. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Message-id: 53331c00d80c7ce9c6a83712348773f1b38fae2b.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm: xlnx-zynqmp: Preface CPU variables with "apu"Peter Crosthwaite2015-06-192-13/+15
| | | | | | | | | | | | The CPUs currently supported by zynqmp are the APU (application processing unit) CPUs. There are other CPUs in Zynqmp so unqualified "cpus" in ambiguous. Preface the variables with "APU" accordingly, to prepare support adding the RPU (realtime processing unit) processors. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: ce32287fc365aea898465e981da3546a227e0811.1434501320.git.peter.crosthwaite@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm/sysbus-fdt: enable vfio-calxeda-xgmac dynamic instantiationEric Auger2015-06-192-11/+74
| | | | | | | | | | | | | This patch allows the instantiation of the vfio-calxeda-xgmac device from the QEMU command line (-device vfio-calxeda-xgmac,host="<device>"). A specialized device tree node is created for the guest, containing compat, dma-coherent, reg and interrupts properties. Signed-off-by: Eric Auger <eric.auger@linaro.org> Acked-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1434455898-17895-1-git-send-email-eric.auger@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
OpenPOWER on IntegriCloud