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* sysbus: Drop sysbus_from_qdev() cast macroAndreas Färber2013-01-211-3/+3
| | | | | | | | | | | Replace by SYS_BUS_DEVICE() QOM cast macro using a scripted conversion. Avoids the old macro creeping into new code. Resolve a Coding Style warning in openpic code. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Make all static TypeInfos constAndreas Färber2013-01-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Since 39bffca2030950ef6efe57c2fac8327a45ae1015 (qdev: register all types natively through QEMU Object Model), TypeInfo as used in the common, non-iterative pattern is no longer amended with information and should therefore be const. Fix the documented QOM examples: sed -i 's/static TypeInfo/static const TypeInfo/g' include/qom/object.h Since frequently the wrong examples are being copied by contributors of new devices, fix all types in the tree: sed -i 's/^static TypeInfo/static const TypeInfo/g' */*.c sed -i 's/^static TypeInfo/static const TypeInfo/g' */*/*.c This also avoids to piggy-back these changes onto real functional changes or other refactorings. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* arm: a9mpcore: remove un-used ptimer_iomem fieldPeter Crosthwaite2012-12-071-1/+0
| | | | | | | | | I'm guessing this is a hangover from a previous coreification of the mptimer sub-module. This field is completely unused - removed. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* Rename target_phys_addr_t to hwaddrAvi Kivity2012-10-231-2/+2
| | | | | | | | | | | | | | | target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* hw/a9mpcore: Fix compilation failure if physaddrs are 64 bitPeter Maydell2012-06-191-1/+1
| | | | | | | | | | Add a cast to a logging printf to avoid a compilation failure if target_phys_addr_t is a 64 bit type. (This is better than using TARGET_FMT_plx because we really don't need a full 16 digit hex string to print the offset into a device.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com>
* hw/a9mpcore: Switch to using sysbus GICPeter Maydell2012-04-131-25/+35
| | | | | | | | Switch the a9mpcore to using the sysbus GIC device rather than having the a9mp private memory region device subclass the GIC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/arm_gic: Make the GIC its own sysbus devicePeter Maydell2012-04-131-0/+1
| | | | | | | | | | Compile arm_gic.c as a standalone C file to produce a self contained sysbus GIC device. Support the legacy usage by #include of the .c file by making those users #define LEGACY_INCLUDED_GIC, so we can convert them one by one. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
* hw/arm_gic: Move gic_get_current_cpu into arm_gic.cPeter Maydell2012-04-131-9/+0
| | | | | | | | | | | | | Move the gic_get_current_cpu() function into arm_gic.c. There are only two implementations: (1) "get the index of the currently executing CPU", used by all multicore GICs, and (2) "always 0", used by all GICs instantiated with a single CPU interface (the Realview board GIC and the v7M NVIC). So we can move this into the main GIC source file. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
* hw/arm_gic: Move NCPU definition to arm_gic.cPeter Maydell2012-04-131-7/+1
| | | | | | | | | | Move the NCPU definition to arm_gic.c: the maximum number of CPU interfaces is defined by the GIC architecture specification to be 8, so we don't need to have this #define in each of the sources files which currently includes arm_gic.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Evgeny Voevodin <e.voevodin@samsung.com>
* qom: Unify type registrationAndreas Färber2012-02-151-2/+2
| | | | | | | | | | | | | Replace device_init() with generalized type_init(). While at it, unify naming convention: type_init([$prefix_]register_types) Also, type_init() is a function, so add preceding blank line where necessary and don't put a semicolon after the closing brace. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Anthony Liguori <anthony@codemonkey.ws> Cc: malc <av1474@comtv.ru> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* qdev: register all types natively through QEMU Object ModelAnthony Liguori2012-02-031-18/+22
| | | | | | | | | | | | | | | | | | | | | This was done in a mostly automated fashion. I did it in three steps and then rebased it into a single step which avoids repeatedly touching every file in the tree. The first step was a sed-based addition of the parent type to the subclass registration functions. The second step was another sed-based removal of subclass registration functions while also adding virtual functions from the base class into a class_init function as appropriate. Finally, a python script was used to convert the DeviceInfo structures and qdev_register_subclass functions to TypeInfo structures, class_init functions, and type_register_static calls. We are almost fully converted to QOM after this commit. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* sysbus: apic: ioapic: convert to QEMU Object ModelAnthony Liguori2012-01-271-7/+14
| | | | | | | This converts three devices because apic and ioapic are subclasses of sysbus. Converting subclasses independently of their base class is prohibitively hard. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* arm: make the number of GIC interrupts configurableMark Langsdorf2012-01-171-3/+10
| | | | | | | | | | | | | | | | | Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020, and create a configurable property for each defaulting to 96 and 64 (respectively) so that device modelers can set the value appropriately for their SoC. Other ARM processors also set their maximum number of used IRQs appropriately. Set the maximum theoretical number of GIC interrupts to 1020 and update the save/restore code to only use the appropriate number for each SoC. Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Reviewed-by: Andreas Färber <afaerber@suse.de> [Peter Maydell: fixed minor whitespace snafu] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* arm: add missing scu registersRob Herring2012-01-041-3/+33
| | | | | | | | Add power control register to a9mpcore Signed-off-by: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* hw/a9mpcore.c: Implement A9MP peripherals rather than 11MPcore onesPeter Maydell2011-12-121-10/+179
| | | | | | | | Implement the A9MP private peripheral region correctly, rather than piggybacking on the 11MPCore code; the two CPUs are not the same in this area. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* Correct spelling of licensedMatthew Fernandez2011-07-231-1/+1
| | | | | | | | | Correct typos of "licenced" to "licensed". Reviewed-by: Stefan Weil <weil@mail.berlios.de> Reviewed-by: Andreas F=E4rber <andreas.faerber@web.de> Signed-off-by: Matthew Fernandez <matthew.fernandez@gmail.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* ARM PBX-A9 board supportPaul Brook2009-11-191-0/+29
Implement ARM RealView PBX-A9 board support. Signed-off-by: Paul Brook <paul@codesourcery.com>
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