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* softfloat: Fix compilation failures with USE_SOFTFLOAT_STRUCT_TYPESPeter Maydell2011-02-102-15/+21
| | | | | | | | | | | | Make softfloat compile with USE_SOFTFLOAT_STRUCT_TYPES defined, by adding and using new macros const_float16(), const_float32() and const_float64() so you can use array initializers in an array of float16/float32/float64 whether the types are bare or wrapped in the structs. [aurelien@aurel32.net: do the same for float16] Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Correctly handle NaNs in float16_to_float32()Peter Maydell2011-02-102-3/+18
| | | | | | | | Correctly handle NaNs in float16_to_float32(), by defining and using a float16ToCommonNaN() function, as we do with the other formats. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Fix single-to-half precision float conversionsPeter Maydell2011-02-102-11/+38
| | | | | | | | | | | | | | | | | Fix various bugs in the single-to-half-precision conversion code: * input NaNs not correctly converted in IEEE mode (fixed by defining and using a commonNaNToFloat16()) * wrong values returned when converting NaN/Inf into non-IEEE half precision value * wrong values returned for conversion of values which are on the boundary between denormal and zero for the half precision format * zeroes not correctly identified * excessively large results in non-IEEE mode should generate InvalidOp, not Overflow Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Honour default_nan_mode for float-to-float conversionsChristophe Lyon2011-02-102-16/+37
| | | | | | | | | | | | Honour the default_nan_mode flag when doing conversions between different floating point formats, as well as when returning a NaN from a two-operand floating point function. This corrects the behaviour of float<->double conversions on both ARM and SH4. Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Add float16 type and float16 NaN handling functionsPeter Maydell2011-02-103-10/+116
| | | | | | | | | | Add a float16 type to softfloat, rather than using bits16 directly. Also add the missing functions float16_is_quiet_nan(), float16_is_signaling_nan() and float16_maybe_silence_nan(), which are needed for the float16 conversion routines. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: fix floatx80_is_{quiet,signaling}_nan()Aurelien Jarno2011-01-201-4/+8
| | | | | | | | | | | floatx80_is_{quiet,signaling}_nan() functions are incorrectly detecting the type of NaN, depending on SNAN_BIT_IS_ONE, one of the two is returning the correct value, and the other true for any kind of NaN. This patch fixes that by applying the same kind of comparison as for other float formats, but taking into account the explicit bit. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Add float32_is_zero_or_denormal() functionPeter Maydell2011-01-141-0/+5
| | | | | | | | | Add a utility function to softfloat to test whether a float32 is zero or denormal. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: fix default-NaN modeAurelien Jarno2011-01-141-18/+18
| | | | | | | | | | | | When the default-NaN mode is enabled, it should return the default NaN value, but it should anyway raise the invalid operation flag if one of the operand is an sNaN. I have checked that this behavior matches the ARM and SH4 manuals, as well as real SH4 hardware. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: SH4 has the sNaN bit setAurelien Jarno2011-01-141-5/+5
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Implement floatx80_is_any_nan() and float128_is_any_nan()Peter Maydell2011-01-071-0/+11
| | | | | | | | | Implement versions of float*_is_any_nan() for the floatx80 and float128 types. Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Riku Voipio <riku.voipio@iki.fi>
* softfloat: Implement flushing input denormals to zeroPeter Maydell2011-01-062-3/+123
| | | | | | | | | | | | | | Add support to softfloat for flushing input denormal float32 and float64 to zero. softfloat's existing 'flush_to_zero' flag only flushes denormals to zero on output. Some CPUs need input denormals to be flushed before processing as well. Implement this, using a new status flag to enable it and a new exception status bit to indicate when it has happened. Existing CPUs should be unaffected as there is no behaviour change unless the mode is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-ppc: Implement correct NaN propagation rulesAurelien Jarno2011-01-061-2/+17
| | | | | | | | | | | Implement the correct NaN propagation rules for PowerPC targets by providing an appropriate pickNaN function. Also fix the #ifdef tests for default NaN definition, the correct name is TARGET_PPC instead of TARGET_POWERPC. Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-mips: Implement correct NaN propagation rulesAurelien Jarno2011-01-061-0/+27
| | | | | | | Implement the correct NaN propagation rules for MIPS targets by providing an appropriate pickNaN function. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: use float{32,64,x80,128}_maybe_silence_nan()Aurelien Jarno2011-01-061-43/+16
| | | | | | | | | Use float{32,64,x80,128}_maybe_silence_nan() instead of toggling the sNaN bit manually. This allow per target implementation of sNaN to qNaN conversion. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
* softfloat: add float{x80,128}_maybe_silence_nan()Aurelien Jarno2011-01-062-0/+48
| | | | | | | | Add float{x80,128}_maybe_silence_nan() functions, they will be need by propagateFloat{x80,128}NaN(). Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: fix float{32,64}_maybe_silence_nan() for MIPSAurelien Jarno2011-01-061-6/+14
| | | | | | | | | | | | | On targets that define sNaN with the sNaN bit as one, simply clearing this bit may correspond to an infinite value. Convert it to a default NaN if SNAN_BIT_IS_ONE, as it corresponds to the MIPS implementation, the only emulated CPU with SNAN_BIT_IS_ONE. When other CPU of this type are added, this might be updated to include more cases. Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: rename *IsNaN variables to *IsQuietNaNAurelien Jarno2011-01-061-16/+20
| | | | | | | | | Similarly to what has been done in commit 185698715dfb18c82ad2a5dbc169908602d43e81 rename the misnamed *IsNaN variables into *IsQuietNaN. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: remove HPPA specific codeAurelien Jarno2011-01-061-5/+1
| | | | | | | | | | | We don't have any HPPA target, so let's remove HPPA specific code. It can be re-added when someone adds an HPPA target. This has been blessed by Stuart Brady <sdb@zubnet.me.uk>, author of the target-hppa fork. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-arm: Implement correct NaN propagation rulesPeter Maydell2011-01-021-0/+23
| | | | | | | | Implement the correct NaN propagation rules for ARM targets by providing an appropriate pickNaN function. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: abstract out target-specific NaN propagation rulesPeter Maydell2011-01-021-60/+100
| | | | | | | | | | | IEEE754 doesn't specify precisely what NaN should be returned as the result of an operation on two input NaNs. This is therefore target-specific. Abstract out the code in propagateFloat*NaN() which was implementing the x87 propagation rules, so that it can be easily replaced on a per-target basis. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Rename float*_is_nan() functions to float*_is_quiet_nan()Peter Maydell2011-01-024-22/+22
| | | | | | | | | | | | | | | | The softfloat functions float*_is_nan() were badly misnamed, because they return true only for quiet NaNs, not for all NaNs. Rename them to float*_is_quiet_nan() to more accurately reflect what they do. This change was produced by: perl -p -i -e 's/_is_nan/_is_quiet_nan/g' $(git grep -l is_nan) (with the results manually checked.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: Add float/double to 16 bit integer conversion functionsPeter Maydell2010-12-072-0/+140
| | | | | | | | | The ARM architecture needs float/double to 16 bit integer conversions. (The 32 bit versions aren't sufficient because of the requirement to saturate at 16 bit MAXINT/MININT and to get the exception bits right.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
* softfloat: Add float*_maybe_silence_nan() functionsPeter Maydell2010-12-072-0/+40
| | | | | | | | Add functions float*_maybe_silence_nan() which ensure that a value is not a signaling NaN by turning it into a quiet NaN. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
* softfloat: Add float*_is_any_nan() functionsPeter Maydell2010-12-071-0/+10
| | | | | | | | Add float*_is_any_nan() functions which return true if the argument is a NaN of any kind (quiet or signalling). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Nathan Froyd <froydnj@codesourcery.com>
* softfloat: add float32_exp2()Aurelien Jarno2010-07-132-0/+82
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* softfloat: remove dead assignments, spotted by clangBlue Swirl2010-03-071-8/+4
| | | | | | Value stored to 'bSign' is never read. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-alpha: Split up FPCR value into separate fields.Richard Henderson2010-02-231-1/+0
| | | | | | | | | | | | The fpcr_exc_status, fpcr_exc_mask, and fpcr_dyn_round fields are stored in <softfloat.h> format for convenience during regular execution. Revert the addition of float_exception_mask to float_status, added in ba0e276db4b51bd2255a5d5ff8902c70d32ade40. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* arm host: fix compiler warningStefan Weil2010-02-062-27/+0
| | | | | | | | | | | | | | | | | | | | Compilation for arm (native or cross) results in this warning: fpu/softfloat-native.c: In function ‘float64_round_to_int’: fpu/softfloat-native.c:387: error: control reaches end of non-void function float64_round_to_int uses special assembler code for arm and has no explicit return value. As there is no obvious reason why arm should need special code, all fpu related conditionals were removed. The remaining code is standard (C99) and compiles for arm, too. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Acked-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Fixes for alpha-linux syscalls.Richard Henderson2009-12-131-0/+1
| | | | | | | | | | | | | | | | | | 1. Add correct definitions of error numbers. 2. Implement SYS_osf_sigprocmask 3. Implement SYS_osf_get/setsysinfo for IEEE_FP_CONTROL. This last requires exposing the FPCR value to do_syscall. Since this value is actually split up into the float_status, expose routines from helper.c to access it. Finally, also add a float_exception_mask field to float_status. We don't actually use it to control delivery of exceptions to the emulator yet, but simply hold the value that we placed there when loading/storing the FPCR. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* target-alpha: Enable softfloat.Richard Henderson2009-12-131-2/+2
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Silence softfloat warnings on OpenSolarisAndreas Färber2009-12-131-1/+1
| | | | | | | | | | | | Don't define C99 math functions on OpenSolaris (Solaris 11), which still ships GCC 3.4.3. This fixes redefinition warnings. Spotted by Palle Lyckegaard. Signed-off-by: Andreas Färber <afaerber@opensolaris.org> Cc: Palle Lyckegaard <palle@lyckegaard.dk> Cc: Ben Taylor <bentaylor.solx86@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Add support for GNU/kFreeBSDAurelien Jarno2009-11-292-3/+5
| | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* ARM FP16 supportPaul Brook2009-11-192-0/+144
| | | | | | Implement the ARM VFP half precision floating point extensions. Signed-off-by: Paul Brook <paul@codesourcery.com>
* rename NEEDS_LIBSUNMATH to CONFIG_NEEDS_LIBSUNMATHJuan Quintela2009-07-272-2/+2
| | | | | | | Once there fix a place where it was misspelled Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* rename WORDS_BIGENDIAN to HOST_WORDS_BIGENDIANJuan Quintela2009-07-271-1/+1
| | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* rename HOST_BSD to CONFIG_BSDJuan Quintela2009-07-273-5/+5
| | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* change HOST_SOLARIS to CONFIG_SOLARIS{_VERSION}Juan Quintela2009-07-273-10/+14
| | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Fix OpenSolaris gcc4 warnings: iovec type mismatches, missing 'static'blueswir12009-04-131-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7103 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix OpenSolaris softfloat warningsblueswir12009-04-132-1/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7102 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename one more _BSD to HOST_BSD (spotted by Hasso Tepper)blueswir12009-03-081-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6782 c046a42c-6fe2-441c-8c8c-71466251a162
* Rename _BSD to HOST_BSD so that it's more obvious that it's defined by configureblueswir12009-03-082-4/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6775 c046a42c-6fe2-441c-8c8c-71466251a162
* Sparse fixes: dubious mixing of bitwise and logical operationsblueswir12009-03-071-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6741 c046a42c-6fe2-441c-8c8c-71466251a162
* soft-float: add float32_log2() and float64_log2()aurel322009-02-052-0/+95
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6518 c046a42c-6fe2-441c-8c8c-71466251a162
* softfloat: add a 1.0 constant for float32 and float64aurel322009-02-041-0/+2
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6514 c046a42c-6fe2-441c-8c8c-71466251a162
* Add static qualifier to local functionsmalc2009-01-251-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6436 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove all traces of __powerpc__malc2009-01-141-1/+1
| | | | | | | | According to $GCC/gcc/config/rs6000/rs6000-c.c _ARCH_PPC is the ubiquitous define which should be used to test whether gcc targets PowerPC, on 64bit platforms _ARCH_PPC64 will be also defined. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6301 c046a42c-6fe2-441c-8c8c-71466251a162
* softfloat-native: fix type of float_rounding_modeaurel322008-12-201-2/+2
| | | | | | | | | | fegetround() and fesetround() are using an int type. Change the type of float_rounding_mode and floatx80_rounding_precision in the float_status structure for consistency. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6115 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement flush-to-zero mode (denormal results are replaced with zero).pbrook2008-12-192-3/+23
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6107 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement default-NaN mode.pbrook2008-12-192-0/+23
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6106 c046a42c-6fe2-441c-8c8c-71466251a162
* Correctly normalize values and handle zero inputs to scalbn functions.pbrook2008-12-191-8/+29
| | | | | | | Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6102 c046a42c-6fe2-441c-8c8c-71466251a162
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