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* exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-12/+8
| | | | | | Use CPUState. Allows to clean up CPUArchState in gdbstub. Signed-off-by: Andreas Färber <afaerber@suse.de>
* exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argumentAndreas Färber2014-03-131-17/+17
| | | | | | Use CPUState. This lets us drop a few local env usages. Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change tb_gen_code() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* translate-all: Change tb_check_watchpoint() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu-exec: Change cpu_loop_exit() argument to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move breakpoints field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-8/+13
| | | | | | | | Most targets were using offsetof(CPUFooState, breakpoints) to determine how much of CPUFooState to clear on reset. Use the next field after CPU_COMMON instead, if any, or sizeof(CPUFooState) otherwise. Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move watchpoint fields from CPU_COMMON to CPUStateAndreas Färber2014-03-131-13/+20
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move exception_index field from CPU_COMMON to CPUStateAndreas Färber2014-03-131-1/+1
| | | | Signed-off-by: Andreas Färber <afaerber@suse.de>
* cpu: Move mem_io_{pc,vaddr} fields from CPU_COMMON to CPUStateAndreas Färber2014-03-131-4/+5
| | | | | | Reset them. Signed-off-by: Andreas Färber <afaerber@suse.de>
* Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell2014-03-111-4/+10
|\ | | | | | | | | | | | | | | | | * remotes/kvm/uq/master: target-i386: bugfix of Intel MPX file_ram_alloc: unify mem-path,mem-prealloc error handling kvm-all: exit in case max vcpus exceeded Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * file_ram_alloc: unify mem-path,mem-prealloc error handlingMarcelo Tosatti2014-02-271-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -mem-prealloc asks to preallocate memory residing on -mem-path path. Currently QEMU exits in case: - Memory file has been created but allocation via explicit write fails. And it fallbacks to malloc in case: - Querying huge page size fails. - Lack of sync MMU support. - Open fails. - mmap fails. Have the same behaviour for all cases: fail in case -mem-path and -mem-prealloc are specified for regions where the requested size is suitable for hugepages. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | exec: Remove unneeded include filesStefan Weil2014-03-031-3/+1
|/ | | | | | | | | This file does not depend on windows.h. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
* exec: Make cpu_memory_rw_debug use the CPUs ASEdgar E. Iglesias2014-02-111-5/+5
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make cpu_physical_memory_write_rom input an ASEdgar E. Iglesias2014-02-111-7/+8
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make stb_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-3/+3
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make stw_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-10/+10
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make stl_phys_notdirty input an AddressSpaceEdgar E. Iglesias2014-02-111-2/+2
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make stl_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-9/+10
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make stq_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-6/+6
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make lduw_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-9/+9
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make ldq/ldub_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-11/+11
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make ldl_*_phys input an AddressSpaceEdgar E. Iglesias2014-02-111-10/+9
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: On AS changes, only flush affected CPU TLBsEdgar E. Iglesias2014-02-111-0/+5
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* cpu: Add per-cpu address spaceEdgar E. Iglesias2014-02-111-8/+19
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make memory_region_section_get_iotlb use section ASEdgar E. Iglesias2014-02-111-1/+1
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Always initialize MemorySection address spacesEdgar E. Iglesias2014-02-111-0/+2
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make iotlb_to_region input an ASEdgar E. Iglesias2014-02-111-3/+2
| | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* exec: Make tb_invalidate_phys_addr input an ASEdgar E. Iglesias2014-02-111-1/+2
| | | | | | | No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* memory: fix limiting of translation at a page boundaryPaolo Bonzini2014-02-101-16/+19
| | | | | | | | | | | | | | | | | | Commit 360e607 (address_space_translate: do not cross page boundaries, 2014-01-30) broke MMIO accesses in cases where the section is shorter than the full register width. This can happen for example with the Bochs DISPI registers, which are 16 bits wide but have only a 1-byte long MemoryRegion (if you write to the "second byte" of the register your access is discarded; it doesn't write only to half of the register). Restrict the action of commit 360e607 to direct RAM accesses. This is enough for Xen, since MMIO will not go through the mapcache. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
* address_space_translate: do not cross page boundariesStefano Stabellini2014-01-301-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 149f54b53b7666a3facd45e86eece60ce7d3b114 Author: Paolo Bonzini <pbonzini@redhat.com> Date: Fri May 24 12:59:37 2013 +0200 memory: add address_space_translate breaks Xen support in QEMU, in particular the Xen mapcache. The effect is that one Windows XP installation out of ten would end up with BSOD. The reason is that after this commit l in address_space_rw can span a page boundary, however qemu_get_ram_ptr still calls xen_map_cache asking to map a single page (if block->offset == 0). Fix the issue by reverting to the previous behaviour: do not return a length from address_space_translate_internal that can span a page boundary. Also in address_space_translate do not ignore the length returned by address_space_translate_internal. This patch should be backported to QEMU 1.6.x. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Anthony Perard <anthony.perard@citrix.com> Tested-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Cc: qemu-stable@nongnu.org
* Merge remote-tracking branch 'qemu-kvm/uq/master' into stagingAnthony Liguori2014-01-241-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * qemu-kvm/uq/master: kvm: always update the MPX model specific register KVM: fix addr type for KVM_IOEVENTFD KVM: Retry KVM_CREATE_VM on EINTR mempath prefault: fix off-by-one error kvm: x86: Separately write feature control MSR on reset roms: Flush icache when writing roms to guest memory target-i386: clear guest TSC on reset target-i386: do not special case TSC writeback target-i386: Intel MPX Conflicts: exec.c aliguori: fix trivial merge conflict in exec.c Signed-off-by: Anthony Liguori <aliguori@amazon.com>
| * mempath prefault: fix off-by-one errorMarcelo Tosatti2013-12-301-1/+1
| | | | | | | | | | | | | | Fix off-by-one error (noticed by Andrea Arcangeli). Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
| * roms: Flush icache when writing roms to guest memoryAlexander Graf2013-12-131-5/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the rom infrastructure to write firmware and/or initial kernel blobs into guest address space. So we're basically emulating the cache off phase on very early system bootup. That phase is usually responsible for clearing the instruction cache for anything it writes into cachable memory, to ensure that after reboot we don't happen to execute stale bits from the instruction cache. So we need to invalidate the icache every time we write a rom into guest address space. We do not need to do this for every DMA since the guest expects it has to flush the icache manually in that case. This fixes random reboot issues on e5500 (booke ppc) for me. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* | memory: split cpu_physical_memory_* functions to its own includeJuan Quintela2014-01-131-0/+1
| | | | | | | | | | | | | | All the functions that use ram_addr_t should be here. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: cpu_physical_memory_set_dirty_tracking() should return voidJuan Quintela2014-01-131-6/+4
| | | | | | | | | | | | | | | | | | Result was always 0, and not used anywhere. Once there, use bool type for the parameter. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: make cpu_physical_memory_reset_dirty() take a length parameterJuan Quintela2014-01-131-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | We have an end parameter in all the callers, and this make it coherent with the rest of cpu_physical_memory_* functions, that also take a length parameter. Once here, move the start/end calculation to tlb_reset_dirty_range_all() as we don't need it here anymore. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: s/dirty/clean/ in cpu_physical_memory_is_dirty()Juan Quintela2014-01-131-3/+3
| | | | | | | | | | | | | | | | All uses except one really want the other meaning. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: s/mask/clear/ cpu_physical_memory_mask_dirty_rangeJuan Quintela2014-01-131-1/+1
| | | | | | | | | | | | | | | | Now all functions use the same wording that bitops/bitmap operations Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: split dirty bitmap into threeJuan Quintela2014-01-131-3/+6
| | | | | | | | | | | | | | | | | | | | | | After all the previous patches, spliting the bitmap gets direct. Note: For some reason, I have to move DIRTY_MEMORY_* definitions to the beginning of memory.h to make compilation work. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: only resize dirty bitmap when memory size increasesJuan Quintela2014-01-131-3/+9
| | | | | | | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: cpu_physical_memory_mask_dirty_range() always clears a single flagJuan Quintela2014-01-131-9/+10
| | | | | | | | | | | | | | | | Document it Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: cpu_physical_memory_set_dirty_range() always dirty all flagsJuan Quintela2014-01-131-1/+1
| | | | | | | | | | | | | | | | | | | | So remove the flag argument and do it directly. After this change, there is nothing else using cpu_physical_memory_set_dirty_flags() so remove it. Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: set single dirty flags when possibleJuan Quintela2014-01-131-3/+4
| | | | | | | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | memory: make cpu_physical_memory_is_dirty return boolJuan Quintela2014-01-131-5/+2
| | | | | | | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | exec: create function to get a single dirty bitJuan Quintela2014-01-131-1/+1
| | | | | | | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com>
* | exec: use accessor function to know if memory is dirtyJuan Quintela2014-01-131-1/+1
| | | | | | | | | | | | Signed-off-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Orit Wasserman <owasserm@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
* | roms: Flush icache when writing roms to guest memoryAlexander Graf2013-12-201-5/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the rom infrastructure to write firmware and/or initial kernel blobs into guest address space. So we're basically emulating the cache off phase on very early system bootup. That phase is usually responsible for clearing the instruction cache for anything it writes into cachable memory, to ensure that after reboot we don't happen to execute stale bits from the instruction cache. So we need to invalidate the icache every time we write a rom into guest address space. We do not need to do this for every DMA since the guest expects it has to flush the icache manually in that case. This fixes random reboot issues on e5500 (booke ppc) for me. Signed-off-by: Alexander Graf <agraf@suse.de>
* | exec: separate sections and nodes per address spaceMarcel Apfelbaum2013-12-111-89/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every address space has its own nodes and sections, but it uses the same global arrays of nodes/section. This limits the number of devices that can be attached to the guest to 20-30 devices. It happens because: - The sections array is limited to 2^12 entries. - The main memory has at least 100 sections. - Each device address space is actually an alias to main memory, multiplying its number of nodes/sections. Remove the limitation by using separate arrays of nodes and sections for each address space. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | exec: reduce L2_PAGE_SIZEMichael S. Tsirkin2013-12-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | With the single exception of ppc with 16M pages, we get the same number of levels with L2_PAGE_SIZE = 10 as with L2_PAGE_SIZE = 9. by doing this we reduce memory footprint of a single level in the node memory map by 2x without runtime overhead. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | exec: make address spaces 64-bit widePaolo Bonzini2013-12-101-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As an alternative to commit 818f86b (exec: limit system memory size, 2013-11-04) let's just make all address spaces 64-bit wide. This eliminates problems with phys_page_find ignoring bits above TARGET_PHYS_ADDR_SPACE_BITS and address_space_translate_internal consequently messing up the computations. In Luiz's reported crash, at startup gdb attempts to read from address 0xffffffffffffffe6 to 0xffffffffffffffff inclusive. The region it gets is the newly introduced master abort region, which is as big as the PCI address space (see pci_bus_init). Due to a typo that's only 2^63-1, not 2^64. But we get it anyway because phys_page_find ignores the upper bits of the physical address. In address_space_translate_internal then diff = int128_sub(section->mr->size, int128_make64(addr)); *plen = int128_get64(int128_min(diff, int128_make64(*plen))); diff becomes negative, and int128_get64 booms. The size of the PCI address space region should be fixed anyway. Reported-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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