summaryrefslogtreecommitdiffstats
path: root/disas/mips.c
Commit message (Expand)AuthorAgeFilesLines
* disas/mips: Add R6 jr/jr.hb to disassemblerJames Hogan2015-10-191-0/+2
* disas/mips: fix disassembling R6 instructionsYongbok Kim2015-07-151-6/+6
* target-mips: add MTHC0 and MFHC0 instructionsLeon Alrae2015-06-121-0/+2
* target-mips: add ERETNC instruction and Config5.LLB bitLeon Alrae2015-06-111-0/+1
* disas/mips: disable unused mips16_to_32_reg_map[]Leon Alrae2014-12-161-1/+2
* disas/mips: remove unused mips_msa_control_names_numeric[32]Leon Alrae2014-12-161-7/+0
* disas/mips.c: disassemble MSA instructionsYongbok Kim2014-11-031-2/+714
* target-mips: add TLBINV supportLeon Alrae2014-11-031-0/+2
* target-mips: remove JR, BLTZAL, BGEZAL and add NAL, BAL instructionsYongbok Kim2014-10-141-0/+2
* target-mips: add new Floating Point Comparison instructionsYongbok Kim2014-10-141-0/+44
* target-mips: add new Floating Point instructionsLeon Alrae2014-10-141-0/+22
* target-mips: add AUI, LSA and PCREL instruction familiesLeon Alrae2014-10-141-3/+39
* target-mips: add compact and CP1 branchesYongbok Kim2014-10-131-3/+64
* target-mips: add ALIGN, DALIGN, BITSWAP and DBITSWAP instructionsYongbok Kim2014-10-131-0/+4
* target-mips: move CLO, DCLO, CLZ, DCLZ, SDBBP and free special2 in R6Leon Alrae2014-10-131-0/+5
* target-mips: redefine Integer Multiply and Divide instructionsLeon Alrae2014-10-131-0/+16
* target-mips: move PREF, CACHE, LLD and SCD instructionsLeon Alrae2014-10-131-0/+4
* target-mips: move LL and SC instructionsLeon Alrae2014-10-131-1/+8
* target-mips: add SELEQZ and SELNEZ instructionsLeon Alrae2014-10-131-0/+8
* build: kill libdis, move disassemblers to disas/Paolo Bonzini2012-12-191-0/+4873
OpenPOWER on IntegriCloud