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* PPC: Fix sync instructions problem in SMPElie Richa2011-10-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current emulation of the load-and-reserve (lwarx) and store-conditional (stwcx.) instructions, the internal reservation mechanism is taken into account, however each CPU has its own reservation information and this information is not synchronized between CPUs to perform proper synchronization. The following test case with 2 CPUs shows that the semantics of the "lwarx" and "stwcx." instructions are not preserved by the emulation. The test case does the following : - CPU0: reserve a memory location - CPU1: reserve the same memory location - CPU0: perform stwcx. on the location The last store-conditional operation succeeds while it is supposed to fail since the reservation was supposed to be lost at the second reserve operation. This (one line) patch fixes this problem in a very simple manner by removing the reservation of a CPU every time it is scheduled (in cpu_exec()). While this is a harsh workaround, it does not affect the guest code much because reservations are usually held for a very short time, that is an lwarx is almost always followed by an stwcx. a few instructions below. Therefore, in most cases, the reservation will be taken and consumed before a CPU switch occurs. However in the rare case where a CPU switch does occur between the lwarx and its corresponding stwcx. this patch solves a potential erroneous behavior of the synchronization instructions. Signed-off-by: Elie Richa <richa@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
* target-xtensa: implement exceptionsMax Filippov2011-09-101-0/+6
| | | | | | | | - mark privileged opcodes with ring check; - make debug exception on exception handler entry. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* target-xtensa: add target stubsMax Filippov2011-09-101-0/+2
| | | | | Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu-exec: remove unnecessary assignmentBlue Swirl2011-09-101-2/+3
| | | | | | | | | | Avoid this warning from clang analyzer: /src/qemu/cpu-exec.c:97:5: warning: Value stored to 'phys_page2' is never read phys_page2 = -1; Adjust the scope of the variable while at it. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* tcg: Reload local variables after return from longjmpJan Kiszka2011-07-121-0/+4
| | | | | | | | | | | Recent compilers look deep into cpu_exec, find longjmp as a noreturn function and decide to smash some stack variables as they won't be used again. This may lead to env becoming invalid after return from setjmp, causing crashes. Fix it by reloading env from cpu_single_env in that case. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu-exec.c: avoid AREG0 useBlue Swirl2011-06-261-54/+20
| | | | | | | | | | | | | | | | | Make functions take a parameter for CPUState instead of relying on global env. Pass CPUState pointer to TCG prologue, which moves it to AREG0. Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue change. Revert the hacks to avoid AREG0 use on Sparc hosts. Move cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. Compile the file without HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* exec.h: fix coding style and change cpu_has_work to return boolBlue Swirl2011-06-261-1/+1
| | | | | | | | | Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu-exec: unify do_interrupt callBlue Swirl2011-06-261-26/+0
| | | | | | | Now that all targets use common function signature for do_interrupt(), there is no need for the #ifdeffery anymore. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* m68k: use caller supplied CPUState for interrupt related stuffBlue Swirl2011-06-261-2/+2
| | | | | | | | | Pass CPUState to do_interrupt(). This is needed by later patches. It would be cleaner to move the function to helper.c, but there are a few dependencies between do_interrupt() and other functions. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: use caller supplied CPUState for interrupt related stuffBlue Swirl2011-06-261-26/+15
| | | | | | | | | | | | | | Several x86 specific functions are called from cpu-exec.c with the assumption that global env register is valid. This will be changed later, so make the functions use caller supplied CPUState parameter. It would be cleaner to move the functions to helper.c, but there are quite a lot of dependencies between do_interrupt() and other functions. Add helpers for svm_check_intercept() and cpu_cc_compute_all() instead of calling the helper (which uses global env, AREG0) directly. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu_loop_exit: avoid using AREG0Blue Swirl2011-06-261-8/+8
| | | | | | | Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove unneeded kvm.h from cpu-exec.cJan Kiszka2011-06-201-1/+0
| | | | | | | This was obsoleted by 6792a57bf1. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* target-alpha: Disable interrupts properly.Richard Henderson2011-05-311-3/+30
| | | | | | Interrupts are disabled in PALmode, and when the PS IL is high enough. Signed-off-by: Richard Henderson <rth@twiddle.net>
* Move user emulator stuff from cpu-exec.c to user-exec.cBlue Swirl2011-05-281-655/+0
| | | | | | Simplify cpu-exec.c by refactoring. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cpu-exec: prepare for user and softmmu splitBlue Swirl2011-05-281-131/+172
| | | | | | | | | There is little in common with user and softmmu versions of cpu_resume_signal(), split them. Fix coding style for the user emulator part. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Delete unused tb_invalidate_page_rangeBlue Swirl2011-05-221-13/+0
| | | | | | | | | | | | tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Merge remote-tracking branch 'stefanha/trivial-patches' into stagingAnthony Liguori2011-05-121-2/+2
|\ | | | | | | | | Conflicts: cpu-all.h
| * Fix typos in comments and code (occured -> occurred and related)Stefan Weil2011-05-081-1/+1
| | | | | | | | | | | | | | The code changed here is an unused data type name (evt_flush_occurred). Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
| * Fix typos in comments (interupt -> interrupt)Stefan Weil2011-05-081-1/+1
| | | | | | | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
* | target-sparc: Do not check CPU_INTERRUPT_TIMER.Richard Henderson2011-05-081-3/+0
| | | | | | | | | | | | | | This bit is never set, therefore we should not read it either. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* | irq: Introduce and use CPU_INTERRUPT_SSTEP_MASK.Richard Henderson2011-05-081-4/+1
|/ | | | | | | | | | This mask contains all of the bits that should be ignored while single stepping in the debugger. The mask contains 2 bits that are not currently cleared, but are also never set. The bits are included in the mask for consistency in handling of the CPU_INTERRUPT_TGT_EXT_N bits. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* Remove unused function parameter from cpu_restore_stateStefan Weil2011-04-201-1/+1
| | | | | | | | | The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Weil <weil@mail.berlios.de>
* s390x: Enable s390x-softmmu targetAlexander Graf2011-04-181-0/+8
| | | | | | | | This patch adds some code paths for running s390x guest OSs without the need for KVM. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* unicore32: necessary modifications for other files to support unicore32Guan Xuetao2011-04-121-1/+11
| | | | | Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* x86: Unbreak TCG support for hardware breakpointsJan Kiszka2011-03-151-0/+27
| | | | | | | | | | | Commit 83f338f73e broke x86 hardware breakpoint emulation by moving the debug exception handling out of cpu_exec. Fix this by moving all TCG related bits back, only leaving the generic guest debugging parts in cpus.c. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> CC: TeLeMan <geleman@gmail.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* inline cpu_halted into sole callerPaolo Bonzini2011-03-131-2/+7
| | | | | | | | All implementations are now the same, and there is only one caller, so inline the function there. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* LatticeMico32 target supportMichael Walle2011-03-071-1/+12
| | | | | | | | This patch adds support for the LatticeMico32 softcore processor by Lattice Semiconductor. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* kvm: Separate TCG from KVM cpu executionJan Kiszka2011-02-141-13/+6
| | | | | | | | | | | | | | | Mixing up TCG bits with KVM already led to problems around eflags emulation on x86. Moreover, quite some code that TCG requires on cpu enty/exit is useless for KVM. So dispatch between tcg_cpu_exec and kvm_cpu_exec as early as possible. The core logic of cpu_halted from cpu_exec is added to kvm_arch_process_irqchip_events. Moving away from cpu_exec makes exception_index meaningless for KVM, we can simply pass the exit reason directly (only "EXCP_DEBUG vs. rest" is relevant). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* Move debug exception handling out of cpu_execJan Kiszka2011-02-141-24/+0
| | | | | | | | | | | | | | | To prepare splitting up KVM and TCG CPU entry/exit, move the debug exception into cpus.c and invoke cpu_handle_debug_exception on return from qemu_cpu_exec. This also allows to clean up the debug request signaling: We can assign the job of informing main-loop to qemu_system_debug_request and stop the calling cpu directly in cpu_handle_debug_exception. That means a debug stop will now only be signaled via debug_requested and not additionally via vmstop_requested. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* target-mips: fix host CPU consumption when guest is idleAurelien Jarno2010-12-271-5/+1
| | | | | | | | | | | | | | When the CPU is in wait state, do not wake-up if an interrupt can't be taken. This avoid host CPU running at 100% if a device (e.g. timer) has an interrupt line left enabled. Also factorize code to check if interrupts are enabled in cpu_mips_hw_interrupts_pending(). Based on a patch from Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* Speedup 'tb_find_slow' by using the same heuristic as during memory page lookupKirill Batuzov2010-12-051-0/+6
| | | | | | | | Move the last found TB to the head of the list so it will be found more quickly next time it will be looked for. Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru> Signed-off-by: Pavel Yushchenko <pau@ispras.ru> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* mips: Add support for VInt and VEIC irq modesEdgar E. Iglesias2010-08-061-1/+1
| | | | Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
* Fix cpu_exit for tcp_cpu_execJan Kiszka2010-07-221-2/+1
| | | | | | | | | | | | | If a cpu_exit request is pending, ensure that we leave the CPU loop quickly. For this purpose, keep the global exit_request pending until we are about to leave tcg_cpu_exec. Also, immediately break out of the SMP loop if the request is set, do not run till the end of the chain. This preserves the VCPU scheduling order in SMP mode. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Fix cpu_unlink_tb raceJan Kiszka2010-07-221-3/+4
| | | | | | | | | | | | | | | If a signal hit after the env->exit_request check but before cpu_exec updated env->current_tb, cpu_unlink_tb called from the signal hander will not unlink the current TB. This may leave us stuck in a guest loop if no further unlink is invoked. Fix this by reordering current_tb update and exit_request check, additionally enforcing the correct order via a compiler barrier. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* Introduce proper compiler barrierJan Kiszka2010-07-221-2/+3
| | | | | | | | | | Define barrier() as optimization barrier and replace (potentially unreliable) asm("") fences. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg-s390: Compute is_write in cpu_signal_handler.Richard Henderson2010-06-111-3/+39
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* make SIG_IPI to tcg vcpu thread reliableMarcelo Tosatti2010-05-111-0/+7
| | | | | | | | | | Store tcg loop exit request on a global variable, and transfer it to per-CPUState exit_request after assignment of cpu_single_env. This makes exit request signal from robust. Drop the timedlock hack. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* Enable -d cpu logging by default.Richard Henderson2010-05-051-19/+3
| | | | | | | | | | | | When -d cpu logging was handled by target-foo/translate.c, it was controled by DEBUG_DISAS, which is enabled by default. Use the same condition in cpu_exec. At the same time, reduce the if-deffery by assuming no flags update is required for the target. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* tcg-hppa: Compute is_write in cpu_signal_handler.Richard Henderson2010-04-081-7/+31
| | | | | Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
* linux-user/ia64: workaround ia64 strangenessesAurelien Jarno2010-04-011-1/+5
| | | | | | | | | | | ia64 has some strangenesses that need to be workaround: - it has a __clone2() syscall instead of the using clone() one, with different arguments, and which is not declared in the usual headers. - ucontext.uc_sigmask is declared with type long int, while it is actually of type sigset_t. - uc_mcontext, uc_sigmask, uc_stack, uc_link are declared using #define, which clashes with the target_ucontext fields. Change their names to tuc_*, as already done for some target architectures.
* Add tb_page_addr_tPaul Brook2010-03-121-3/+4
| | | | | | | | | The page tracking code in exec.c is used by both userspace and system emulation. Userspace emulation uses it to track virtual pages, and system emulation to track ram pages. Introduce a new type to hold this kind of address. Signed-off-by: Paul Brook <paul@codesourcery.com>
* declare saved_env_reg as volatilePaolo Bonzini2010-02-231-1/+1
| | | | | | | | | | This ensures that the compiler does not move it away from the "env = env1;" assignment. Fixes a miscompilation on gcc 4.4, reported by Jay Foad. Cc: <jay.foad@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* Merge remote branch 'qemu-kvm/uq/master' into stagingAnthony Liguori2010-02-221-5/+7
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| * kvm: Fix eflags corruption in kvm modeJan Kiszka2010-02-211-5/+7
| | | | | | | | | | | | | | | | | | | | | | This should explain a lot of the weird breakages of upstream KVM we've seen recently (actually we should have seen it much earlier): Stop translating eflags into TCG format when in kvm mode as we never translate it back and rather sync this broken state into the kernel. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Avi Kivity <avi@redhat.com>
* | Add FreeBSD/ppc host ucontext definitions.Juergen Lock2010-02-201-0/+18
| | | | | | | | | | | | | | Submitted by: Andreas Tobler <andreast@fgznet.ch> Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de> Signed-off-by: malc <av1474@comtv.ru>
* | get rid of hostregs_helper.hPaolo Bonzini2010-02-181-6/+9
|/ | | | | | | | | Since b567b38 (target-arm: remove T0 and T1, 2009-10-16) the only global register that is used is AREG0, so the complexity of hostregs_helper.h is unused. Use regular assignments and a compiler optimization barrier. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
* cris: Prepare for CRISv10.Edgar E. Iglesias2010-02-151-1/+2
| | | | | | | | * Add prefix flag and special reg. * Add interrupt lockout. * Add CC_OP_MSTEP. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
* avoid unreachable statement after breakPaolo Bonzini2010-01-191-1/+1
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* remove assertionsPaolo Bonzini2010-01-191-4/+0
| | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
* change while to ifPaolo Bonzini2010-01-191-7/+3
| | | | | | | | The while loop will be executed exactly 0 or 1 times, depending on env->exit_request. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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