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* qdev: fix 64 bit propertiesCornelia Huck2015-07-132-2/+2
| | | | | | | | | | | | | 64 bit props used 32 bit callbacks in two places, leading to broken feature bits on virtio (example: got 0x31000000000006d4 which is obviously bogus). Fix this. Fixes: fdba6d96 ("qdev: add 64bit properties") Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com>
* tco-test: fix up config accesses and re-enableMichael S. Tsirkin2015-07-082-13/+4
| | | | | | | | | | | | The mistake that made the test fail was that it tried to use a BAR address as an offset for config accesses to LPC. Config accesses don't need a BAR, and LPC does not have one. Don't attempt to map it. With this change applied, TCO test passes, so re-enable it. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* virtio fix cfg endian-ness for BE targetsMichael S. Tsirkin2015-07-081-8/+83
| | | | | | | | address_space_rw assumes data is in target format and byte-swaps it if target is BE and device is LE. Use fixed-endian LE APIs instead. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* virtio-pci: implement cfg capabilityMichael S. Tsirkin2015-07-082-1/+78
| | | | | | | | | | | spec says we must, so let's do it! Note: the implementation is incorrect for BE targets. Will fix with a patch on top, not a big deal now as the only user is seabios, used on x86 only. Tested-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* virtio: define virtio_pci_cfg_cap in header.Michael S. Tsirkin2015-07-081-0/+6
| | | | | | | | Update virtio pci header from linux-next virtio maintainer tree. We already have VIRTIO_PCI_CAP_PCI_CFG, let's define the structure that goes with it. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pcie: Set the "link active" in the link status registerBenjamin Herrenschmidt2015-07-081-1/+1
| | | | | | | | | Some firmwares can test that and assume the device hasn't come up if that bit isn't set Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* pci_regs.h: import from linuxMichael S. Tsirkin2015-07-083-720/+721
| | | | | | | | | It seems to make sense to import pci_regs.h from linux: why maintain our own? As a first step, move the header to standard-headers, and add it to the update script. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* virtio_net: reuse constants from linuxMichael S. Tsirkin2015-07-082-12/+16
| | | | | | | VIRTIO_NET_F_CTRL_GUEST_OFFLOADS now appears in the linux header, let's reuse it. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/i386/pc: don't carry FDC from pc_basic_device_init() to pc_cmos_init()Laszlo Ersek2015-07-084-11/+9
| | | | | | | | | | | | | | | | | | | | | | Thanks to the last patch, pc_cmos_init() doesn't need the (optional) board-default FDC any longer as an input parameter. Update pc_basic_device_init() not to hand it back to pc_init1() / pc_q35_init(), and update the latter not to carry the FDC to pc_cmos_init(). This simplifies the code. pc_init1() | pc_q35_init() pc_basic_device_init() pc_cmos_init() Cc: Jan Tomko <jtomko@redhat.com> Cc: John Snow <jsnow@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/i386/pc: reflect any FDC @ ioport 0x3f0 in the CMOSLaszlo Ersek2015-07-081-2/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the pc-q35-2.4 machine type, if the user creates an ISA FDC manually: -device isa-fdc,driveA=drive-fdc0-0-0 \ -drive file=...,if=none,id=drive-fdc0-0-0,format=raw then the board-default FDC will be skipped, and only the explicitly requested FDC will exist. qtree-wise, this is correct; however such an FDC is currently not registered in the CMOS, because that code is only reached for the board-default FDC. The pc_cmos_init_late() one-shot reset handler -- one-shot because the CMOS is not reprogrammed during warm reset -- should search for any ISA FDC devices, created implicitly (by board code) or explicitly, and set the CMOS accordingly to the ISA FDC(s) with iobase=0x3f0: - if there is no such FDC, report both drives absent, - if there is exactly one such FDC, report its drives in the CMOS, - if there are more than one such FDCs, then pick one (it is not specified which one), and print a warning about the ambiguity. Cc: Jan Tomko <jtomko@redhat.com> Cc: John Snow <jsnow@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Reported-by: Jan Tomko <jtomko@redhat.com> Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* hw/i386/pc: factor out pc_cmos_init_floppy()Laszlo Ersek2015-07-081-29/+38
| | | | | | | | | | | | | | | | | Extract the pc_cmos_init_floppy() function from pc_cmos_init(). The function sets two RTC registers: floppy drive types (0x10), overwriting the earlier value in there), and REG_EQUIPMENT_BYTE (0x14), setting bits in the prior value. Cc: Jan Tomko <jtomko@redhat.com> Cc: John Snow <jsnow@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* ich9: implement strap SPKR pin logicPaulo Alcantara2015-07-084-3/+28
| | | | | | | | | | | | | | | | | | | If the signal is sampled high, this indicates that the system is strapped to the "No Reboot" mode (ICH9 will disable the TCO Timer system reboot feature). The status of this strap is readable via the NO_REBOOT bit (CC: offset 0x3410:bit 5). The NO_REBOOT bit is set when SPKR pin on ICH9 is sampled high. This bit may be set or cleared by software if the strap is sampled low but may not override the strap when it indicates "No Reboot". This patch implements the logic where hardware has ability to set SPKR pin through a property named "noreboot" and it's sampled high by default. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* tests: add testcase for TCO watchdog emulationPaulo Alcantara2015-07-082-0/+462
| | | | | | | | | | | | | | | | | This patch adds a testcase that covers the following: 1) TCO default values 2) first and second TCO timeout 3) watch and validate ticks counter through TCO_RLD register 4) maximum supported TCO timeout (0x3ff) 5) watchdog actions (pause/reset/shutdown/none) upon second TCO timeout 6) set and get of TCO control and status bits MST: The test does not pass yet, so it's disabled by default. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* ich9: add TCO interface emulationPaulo Alcantara2015-07-0710-8/+439
| | | | | | | | | | | | | | | | | | | This interface provides some registers within a 32-byte range and can be acessed through PCI-to-LPC bridge interface (PMBASE + 0x60). It's commonly used as a watchdog timer to detect system lockups through SMIs that are generated -- if TCO_EN bit is set -- on every timeout. If NO_REBOOT bit is not set in GCS (General Control and Status register), the system will be resetted upon second timeout if TCO_RLD register wasn't previously written to prevent timeout. This patch adds support to TCO watchdog logic and few other features like mapping NMIs to SMIs (NMI2SMI_EN bit), system intruder detection, etc. are not implemented yet. Signed-off-by: Paulo Alcantara <pcacjr@zytor.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* acpi: split out ICH ACPI supportMichael S. Tsirkin2015-07-073-1/+4
| | | | | | | MIPS doesn't need it, and including it creates problem as we are adding dependency on ISA LPC bridge. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* Revert "dataplane: allow virtio-1 devices"Cornelia Huck2015-07-071-26/+21
| | | | | | | | | | | | | | | | This reverts commit f5a5628cf0b65b223fa0c9031714578dfac4cf04. This was an old patch that had been already superseded by b0e5d90eb ("dataplane: endianness-aware accesses"). Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
* dataplane: fix cross-endian issuesGreg Kurz2015-07-071-2/+4
| | | | | | | | | | | | | | | | | | Accesses to vring_avail_event and vring_used_event must honor the queue endianness. This patch allows cross-endian setups to use dataplane (tested with ppc64 on ppc64le, and vice-versa). Suggested-by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: Greg Kurz <gkurz@linux.vnet.ibm.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Cornelia Huck <cornelia.huck@de.ibm.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream-smm' into ↵Peter Maydell2015-07-0622-344/+517
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging This series implements KVM support for SMM, and lets you enable/disable it through the "smm" property of x86 machine types. # gpg: Signature made Mon Jul 6 17:41:05 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream-smm: pc: add SMM property ich9: add smm_enabled field and arguments pc_piix: rename kvm_enabled to smm_enabled target-i386: register a separate KVM address space including SMRAM regions kvm-all: kvm_irqchip_create is not expected to fail kvm-all: add support for multiple address spaces kvm-all: make KVM's memory listener more generic kvm-all: move internal types to kvm_int.h kvm-all: remove useless typedef kvm-all: put kvm_mem_flags to more work target-i386: add support for SMBASE MSR and SMIs piix4/ich9: do not raise SMI on ACPI enable/disable commands linux-headers: Update to 4.2-rc1 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * pc: add SMM propertyPaolo Bonzini2015-07-067-2/+76
| | | | | | | | | | | | | | | | | | The property can take values on, off or auto. The default is "off" for KVM and pre-2.4 machines, otherwise "auto" (which makes it available on TCG or on new-enough kernels). Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * ich9: add smm_enabled field and argumentsPaolo Bonzini2015-07-065-7/+11
| | | | | | | | | | | | | | | | | | Q35's ACPI device is hard-coding SMM availability to KVM. Place the logic where the board is created instead, so that it will be possible to override it. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * pc_piix: rename kvm_enabled to smm_enabledPaolo Bonzini2015-07-063-7/+7
| | | | | | | | | | | | | | | | We will enable SMM even if KVM is in use. Rename the field and arguments. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: register a separate KVM address space including SMRAM regionsPaolo Bonzini2015-07-061-1/+40
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: kvm_irqchip_create is not expected to failPaolo Bonzini2015-07-061-17/+18
| | | | | | | | | | | | | | | | | | | | | | KVM_CREATE_IRQCHIP should never fail, and so should its userspace wrapper kvm_irqchip_create. The function does not do anything if the irqchip capability is not available, as is the case for PPC. With this patch, kvm_arch_init can allocate memory and it will not be leaked. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: add support for multiple address spacesPaolo Bonzini2015-07-062-7/+10
| | | | | | | | | | | | | | Make kvm_memory_listener_register public, and assign a kernel address space id to each KVMMemoryListener. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: make KVM's memory listener more genericPaolo Bonzini2015-07-062-62/+94
| | | | | | | | | | | | | | | | No semantic change, but s->slots moves into a new struct KVMMemoryListener. KVM's memory listener becomes a member of struct KVMState, and becomes of type KVMMemoryListener. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: move internal types to kvm_int.hPaolo Bonzini2015-07-062-17/+31
| | | | | | | | | | | | | | i386 code will have to define a different KVMMemoryListener. Create an internal header so that KVMSlot is not exposed outside. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: remove useless typedefPaolo Bonzini2015-07-061-3/+1
| | | | | | | | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm-all: put kvm_mem_flags to more workAndrew Jones2015-07-061-22/+20
| | | | | | | | | | | | | | | | | | Currently kvm_mem_flags just translates bools to bits, let's make it also determine the bools first. This avoids its parameter list growing each time we add a flag. Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * target-i386: add support for SMBASE MSR and SMIsPaolo Bonzini2015-07-062-12/+94
| | | | | | | | | | | | | | | | | | Apart from the MSR, the smi field of struct kvm_vcpu_events has to be translated into the corresponding CPUX86State fields. Also, memory transaction flags depend on SMM state, so pull it from struct kvm_run on every exit from KVM to userspace. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * piix4/ich9: do not raise SMI on ACPI enable/disable commandsPaolo Bonzini2015-07-062-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These commands are handled entirely by QEMU. Do not raise an SMI when they happen, because Windows (at least 2008r2) expects these commands to work and (depending on the value of APMC_EN at startup) the firmware might not have installed an SMI handler. When this happens (e.g. the kernel supports SMIs, or you are using TCG, but you have used "-machine smm=off") RIP is moved to 0x38000 where there is no code to execute. Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * linux-headers: Update to 4.2-rc1Alexey Kardashevskiy2015-07-067-199/+121
|/ | | | | | | | | | | This updates linux-headers against master 4.2-rc1 (commit d770e558e21961ad6cfdf0ff7df0eb5d7d4f0754). This is the result of ./scripts/update-linux-headers.sh work. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
* Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell2015-07-0626-73/+299
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * more of Peter Crosthwaite's multiarch preparation patches * unlocked MMIO support in KVM * support for compilation with ICC # gpg: Signature made Mon Jul 6 13:59:20 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: exec: skip MMIO regions correctly in cpu_physical_memory_write_rom_internal Stop including qemu-common.h in memory.h kvm: Switch to unlocked MMIO acpi: mark PMTIMER as unlocked kvm: Switch to unlocked PIO kvm: First step to push iothread lock out of inner run loop memory: let address_space_rw/ld*/st* run outside the BQL exec: pull qemu_flush_coalesced_mmio_buffer() into address_space_rw/ld*/st* memory: Add global-locking property to memory regions main-loop: introduce qemu_mutex_iothread_locked main-loop: use qemu_mutex_lock_iothread consistently Fix irq route entries exceeding KVM_MAX_IRQ_ROUTES cpu-defs: Move out TB_JMP defines include/exec: Move tb hash functions out include/exec: Move standard exceptions to cpu-all.h cpu-defs: Move CPU_TEMP_BUF_NLONGS to tcg memory_mapping: Rework cpu related includes cutils: allow compilation with icc qemu-common: add VEC_OR macro Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * exec: skip MMIO regions correctly in cpu_physical_memory_write_rom_internalPaolo Bonzini2015-07-061-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loading the BIOS in the mac99 machine is interesting, because there is a PROM in the middle of the BIOS region (from 16K to 32K). Before memory region accesses were clamped, when QEMU was asked to load a BIOS from 0xfff00000 to 0xffffffff it would put even those 16K from the BIOS file into the region. This is weird because those 16K were not actually visible between 0xfff04000 and 0xfff07fff. However, it worked. After clamping was added, this also worked. In this case, the cpu_physical_memory_write_rom_internal function split the write in three parts: the first 16K were copied, the PROM area (second 16K) were ignored, then the rest was copied. Problems then started with commit 965eb2f (exec: do not clamp accesses to MMIO regions, 2015-06-17). Clamping accesses is not done for MMIO regions because they can overlap wildly, and MMIO registers can be expected to perform full-width accesses based only on their address (with no respect for adjacent registers that could decode to completely different MemoryRegions). However, this lack of clamping also applied to the PROM area! cpu_physical_memory_write_rom_internal thus failed to copy the third range above, i.e. only copied the first 16K of the BIOS. In effect, address_space_translate is expecting _something else_ to do the clamping for MMIO regions if the incoming length is large. This "something else" is memory_access_size in the case of address_space_rw, so use the same logic in cpu_physical_memory_write_rom_internal. Reported-by: Alexander Graf <agraf@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Tested-by: Laurent Vivier <lvivier@redhat.com> Fixes: 965eb2f Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * Stop including qemu-common.h in memory.hPeter Maydell2015-07-066-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Including qemu-common.h from other header files is generally a bad idea, because it means it's very easy to end up with a circular dependency. For instance, if we wanted to include memory.h from qom/cpu.h we'd end up with this loop: memory.h -> qemu-common.h -> cpu.h -> cpu-qom.h -> qom/cpu.h -> memory.h Remove the include from memory.h. This requires us to fix up a few other files which were inadvertently getting declarations indirectly through memory.h. The biggest change is splitting the fprintf_function typedef out into its own header so other headers can get at it without having to include qemu-common.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <1435933104-15216-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * kvm: Switch to unlocked MMIOPaolo Bonzini2015-07-011-2/+1
| | | | | | | | | | | | | | | | | | | | Do not take the BQL before dispatching MMIO requests of KVM VCPUs. Instead, address_space_rw will do it if necessary. This enables completely BQL-free MMIO handling in KVM mode for upcoming devices with fine-grained locking. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-10-git-send-email-pbonzini@redhat.com>
| * acpi: mark PMTIMER as unlockedPaolo Bonzini2015-07-011-0/+1
| | | | | | | | | | | | | | Accessing QEMU_CLOCK_VIRTUAL is thread-safe. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-9-git-send-email-pbonzini@redhat.com>
| * kvm: Switch to unlocked PIOJan Kiszka2015-07-011-2/+1
| | | | | | | | | | | | | | | | | | | | | | Do not take the BQL before dispatching PIO requests of KVM VCPUs. Instead, address_space_rw will do it if necessary. This enables completely BQL-free PIO handling in KVM mode for upcoming devices with fine-grained locking. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-8-git-send-email-pbonzini@redhat.com>
| * kvm: First step to push iothread lock out of inner run loopJan Kiszka2015-07-015-2/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This opens the path to get rid of the iothread lock on vmexits in KVM mode. On x86, the in-kernel irqchips has to be used because we otherwise need to synchronize APIC and other per-cpu state accesses that could be changed concurrently. Regarding pre/post-run callbacks, s390x and ARM should be fine without specific locking as the callbacks are empty. MIPS and POWER require locking for the pre-run callback. For the handle_exit callback, it is non-empty in x86, POWER and s390. Some POWER cases could do without the locking, but it is left in place for now. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-7-git-send-email-pbonzini@redhat.com>
| * memory: let address_space_rw/ld*/st* run outside the BQLJan Kiszka2015-07-011-9/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | The MMIO case is further broken up in two cases: if the caller does not hold the BQL on invocation, the unlocked one takes or avoids BQL depending on the locking strategy of the target memory region and its coalesced MMIO handling. In this case, the caller should not hold _any_ lock (a friendly suggestion which is disregarded by virtio-scsi-dataplane). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: Frederic Konrad <fred.konrad@greensocs.com> Message-Id: <1434646046-27150-6-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * exec: pull qemu_flush_coalesced_mmio_buffer() into address_space_rw/ld*/st*Paolo Bonzini2015-07-012-12/+21
| | | | | | | | | | | | | | | | | | As memory_region_read/write_accessor will now be run also without BQL held, we need to move coalesced MMIO flushing earlier in the dispatch process. Cc: Frederic Konrad <fred.konrad@greensocs.com> Message-Id: <1434646046-27150-5-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * memory: Add global-locking property to memory regionsJan Kiszka2015-07-012-0/+37
| | | | | | | | | | | | | | | | | | | | | | | | This introduces the memory region property "global_locking". It is true by default. By setting it to false, a device model can request BQL-free dispatching of region accesses to its r/w handlers. The actual BQL break-up will be provided in a separate patch. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Cc: Frederic Konrad <fred.konrad@greensocs.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <1434646046-27150-4-git-send-email-pbonzini@redhat.com>
| * main-loop: introduce qemu_mutex_iothread_lockedPaolo Bonzini2015-07-013-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function will be used to avoid recursive locking of the iothread lock whenever address_space_rw/ld*/st* are called with the BQL held, which is almost always the case. Tracking whether the iothread is owned is very cheap (just use a TLS variable) but requires some care because now the lock must always be taken with qemu_mutex_lock_iothread(). Previously this wasn't the case. Outside TCG mode this is not a problem. In TCG mode, we need to be careful and avoid the "prod out of compiled code" step if already in a VCPU thread. This is easily done with a check on current_cpu, i.e. qemu_in_vcpu_thread(). Hopefully, multithreaded TCG will get rid of the whole logic to kick VCPUs whenever an I/O event occurs! Cc: Frederic Konrad <fred.konrad@greensocs.com> Message-Id: <1434646046-27150-3-git-send-email-pbonzini@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * main-loop: use qemu_mutex_lock_iothread consistentlyPaolo Bonzini2015-07-011-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The next patch will require the BQL to be always taken with qemu_mutex_lock_iothread(), while right now this isn't the case. Outside TCG mode this is not a problem. In TCG mode, we need to be careful and avoid the "prod out of compiled code" step if already in a VCPU thread. This is easily done with a check on current_cpu, i.e. qemu_in_vcpu_thread(). Hopefully, multithreaded TCG will get rid of the whole logic to kick VCPUs whenever an I/O event occurs! Cc: Frederic Konrad <fred.konrad@greensocs.com> Message-Id: <1434646046-27150-2-git-send-email-pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * Fix irq route entries exceeding KVM_MAX_IRQ_ROUTES马文霜2015-07-011-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Last month, we experienced several guests crash(6cores-8cores), qemu logs display the following messages: qemu-system-x86_64: /build/qemu-2.1.2/kvm-all.c:976: kvm_irqchip_commit_routes: Assertion `ret == 0' failed. After analysis and verification, we can confirm it's irq-balance daemon(in guest) leads to the assertion failure. Start a 8 core guest with two disks, execute the following scripts will reproduce the BUG quickly: irq_affinity.sh ======================================================================== vda_irq_num=25 vdb_irq_num=27 while [ 1 ] do for irq in {1,2,4,8,10,20,40,80} do echo $irq > /proc/irq/$vda_irq_num/smp_affinity echo $irq > /proc/irq/$vdb_irq_num/smp_affinity dd if=/dev/vda of=/dev/zero bs=4K count=100 iflag=direct dd if=/dev/vdb of=/dev/zero bs=4K count=100 iflag=direct done done ======================================================================== QEMU setup static irq route entries in kvm_pc_setup_irq_routing(), PIC and IOAPIC share the first 15 GSI numbers, take up 23 GSI numbers, but take up 38 irq route entries. When change irq smp_affinity in guest, a dynamic route entry may be setup, the current logic is: if allocate GSI number succeeds, a new route entry can be added. The available dynamic GSI numbers is 1021(KVM_MAX_IRQ_ROUTES-23), but available irq route entries is only 986(KVM_MAX_IRQ_ROUTES-38), GSI numbers greater than route entries. irq-balance's behavior will eventually leads to total irq route entries exceed KVM_MAX_IRQ_ROUTES, ioctl(KVM_SET_GSI_ROUTING) fail and kvm_irqchip_commit_routes() trigger assertion failure. This patch fix the BUG. Signed-off-by: Wenshuang Ma <kevinnma@tencent.com> Cc: qemu-stable@nongnu.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * cpu-defs: Move out TB_JMP definesPeter Crosthwaite2015-06-262-8/+8
| | | | | | | | | | | | | | | | | | | | | | These are not Architecture specific in any way so move them out of cpu-defs.h. tb-hash.h is an appropriate place as a leading user and their strong relationship to TB hashing and caching. Reviewed-by: Richard Henderson <rth@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <43ceca65a3fa240efac49aa0bf604ad0442e1710.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * include/exec: Move tb hash functions outPeter Crosthwaite2015-06-264-20/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is one of very few things in exec-all with a genuine CPU architecture dependency. Move these hashing helpers to a new header to trim exec-all.h down to a near architecture-agnostic header. The defs are only used by cpu-exec and translate-all which are both arch-obj's so the new tb-hash.h has no core code usage. Reviewed-by: Richard Henderson <rth@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <9d048b96f7cfa64a4d9c0b88e0dd2877fac51d41.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * include/exec: Move standard exceptions to cpu-all.hPeter Crosthwaite2015-06-262-6/+6
| | | | | | | | | | | | | | | | | | | | | | These exception indicies are generic and don't have any reliance on the per-arch cpu.h defs. Move them to cpu-all.h so they can be used by core code that does not have access to cpu-defs.h. Reviewed-by: Richard Henderson <rth@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <dbebd3062c7cd4332240891a3564e73f374ddfcd.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * cpu-defs: Move CPU_TEMP_BUF_NLONGS to tcgPeter Crosthwaite2015-06-262-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usages of this define are pure TCG and there is no architecture specific variation of the value. Localise it to the TCG engine to remove another architecture agnostic piece from cpu-defs.h. This follows on from a28177820a868eafda8fab007561cc19f41941f4 where temp_buf was moved out of the CPU_COMMON obsoleting the need for the super early definition. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <498e8e5325c1a1aff79e5bcfc28cb760ef6b214e.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * memory_mapping: Rework cpu related includesPeter Crosthwaite2015-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This makes it more consistent with all other core code files, which either just rely on qemu-common.h inclusion or precede cpu.h with qemu-common.h. cpu-all.h should not be included in addition to cpu.h. Remove it. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <1433714349-7262-1-git-send-email-crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| * cutils: allow compilation with iccArtyom Tarasenko2015-06-261-7/+7
| | | | | | | | | | | | | | | | Use VEC_OR macro for operations on VECTYPE operands Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <3f62d7a3a265f7dd99e50d016a0333a99a4a082a.1435062067.git.atar4qemu@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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