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| * virtio-scsi: convert to virtqueue_mapMichael S. Tsirkin2015-10-291-14/+2
| | | | | | | | | | | | | | | | | | | | Note: virtqueue_map already validates input so virtio-scsi does not have to. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * virtio-serial: convert to virtio_mapMichael S. Tsirkin2015-10-291-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | This also fixes a minor bug: - virtqueue_map_sg(port->elem.out_sg, port->elem.out_addr, - port->elem.out_num, 1); is wrong: out_sg is not written so should not be marked dirty. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * virtio-blk: convert to virtqueue_mapMichael S. Tsirkin2015-10-291-4/+1
| | | | | | | | | | | | | | | | | | Drop deprecated use of virtqueue_map_sg. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * virtio: switch to virtio_mapMichael S. Tsirkin2015-10-291-2/+1
| | | | | | | | | | | | | | | | | | Drop use of the deprecated virtio_map_sg in virtio core. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * virtio: introduce virtio_mapMichael S. Tsirkin2015-10-292-9/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio_map_sg currently fails if one of the entries it's mapping is contigious in GPA but not HVA address space. Introduce virtio_map which handles this by splitting sg entries. This new API generally turns out to be a good idea since it's harder to misuse: at least in one case the existing one was used incorrectly. This will still fail if there's no space left in the sg, but luckily max queue size in use is currently 256, while max sg size is 1024, so we should be OK even is all entries happen to cross a single DIMM boundary. Won't work well with very small DIMM sizes, unfortunately: e.g. this will fail with 4K DIMMs where a single request might span a large number of DIMMs. Let's hope these are uncommon - at least we are not breaking things. Note: virtio-scsi calls virtio_map_sg on data loaded from network, and validates input, asserting on failure. Copy the validating code here - it will be dropped from virtio-scsi in a follow-up patch. Reported-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
| * mmap-alloc: fix error handlingMichael S. Tsirkin2015-10-291-2/+2
| | | | | | | | | | | | | | | | | | | | Existing callers are checking for MAP_FAILED, so we should return that on error. Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * pc: memhp: do not emit inserting event for coldplugged DIMMsIgor Mammedov2015-10-291-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | currently acpi_memory_plug_cb() sets is_inserting for cold- and hot-plugged DIMMs as result ASL MHPD.MSCN() method issues device check even for every coldplugged DIMM. There isn't much harm in it but if we try to unplug such DIMM, OSPM will issue device check intstead of device eject event. So OSPM won't eject memory module as expected and it will try to eject it only when another memory device is hot-(un)plugged. As a fix do not set 'is_inserting' event and do not issue SCI for cold-plugged DIMMs as they are enumerated and activated by OSPM during guest's boot. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * vhost-user-test: fix up rhel6 buildMichael S. Tsirkin2015-10-291-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Build on RHEL6 fails: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=42875 Apparently unnamed unions couldn't use C99 named field initializers. Let's just name the payload union field. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * vhost-user: cleanup msg size mathMichael S. Tsirkin2015-10-291-3/+3
| | | | | | | | | | | | | | | | | | | | We are sending msg fields, use sizeof on these and not on local variables which happen to have a matching type. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| * vhost-user: cleanup struct size mathMichael S. Tsirkin2015-10-291-8/+8
| | | | | | | | | | | | | | | | | | We are using local msg structures everywhere, use them for sizeof as well. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
* | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151028' into stagingPeter Maydell2015-10-2817-10/+80
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | Breakpoint fixes # gpg: Signature made Wed 28 Oct 2015 17:58:52 GMT using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tcg-20151028: target-*: Advance pc after recognizing a breakpoint Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-*: Advance pc after recognizing a breakpointRichard Henderson2015-10-2817-10/+80
|/ | | | | | | | Some targets already had this within their logic, but make sure it's present for all targets. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net>
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into ↵Peter Maydell2015-10-282-2/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging target-i386: finally enable "check" mode by default # gpg: Signature made Wed 28 Oct 2015 14:13:10 GMT using RSA key ID 984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" * remotes/ehabkost/tags/x86-pull-request: target-i386: Enable "check" mode by default target-i386: Don't left shift negative constant Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-i386: Enable "check" mode by defaultEduardo Habkost2015-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current default behavior of QEMU is to silently disable features that are not supported by the host when a CPU model is requested in the command-line. This means that in addition to risking breaking guest ABI by default, we are silent about it. I would like to enable "enforce" by default, but this can easily break existing production systems because of the way libvirt makes assumptions about CPU models today (this will change in the future, once QEMU provide a proper interface for checking if a CPU model is runnable). But there's no reason we should be silent about it. So, change target-i386 to enable "check" mode by default so at least we have some warning printed to stderr (and hopefully logged somewhere) when QEMU disables a feature that is not supported by the host system. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| * target-i386: Don't left shift negative constantEduardo Habkost2015-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | Left shift of negative values is undefined behavior. Detected by clang: qemu/target-i386/translate.c:2423:26: runtime error: left shift of negative value -8 This changes the code to reverse the sign after the left shift. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
* | Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-signed' ↵Peter Maydell2015-10-284-0/+0
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into staging Update OpenBIOS images # gpg: Signature made Wed 28 Oct 2015 00:02:46 GMT using RSA key ID AE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" * remotes/mcayland/tags/qemu-openbios-signed: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * | Update OpenBIOS imagesMark Cave-Ayland2015-10-284-0/+0
| |/ | | | | | | | | | | Update OpenBIOS images to SVN r1353 built from submodule. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
* | Merge remote-tracking branch ↵Peter Maydell2015-10-2716-309/+679
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'remotes/pmaydell/tags/pull-target-arm-20151027-1' into staging target-arm queue: * more EL2 preparation: handling for stage 2 translations * standardize debug macros in i.MX devices * improve error message in a corner case for virt board * disable live migration of KVM GIC if the kernel can't handle it * add SPSR_(ABT|UND|IRQ|FIQ) registers * handle non-executable page-straddling Thumb instructions * fix a "no 64-bit EL2" assumption in arm_excp_unmasked() # gpg: Signature made Tue 27 Oct 2015 16:03:31 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20151027-1: (27 commits) target-arm: Add support for S1 + S2 MMU translations target-arm: Route S2 MMU faults to EL2 target-arm: Add S2 translation to 32bit S1 PTWs target-arm: Add S2 translation to 64bit S1 PTWs target-arm: Add ARMMMUFaultInfo target-arm: Avoid inline for get_phys_addr target-arm: Add support for S2 page-table protection bits target-arm: Add computation of starting level for S2 PTW target-arm: lpae: Rename granule_sz to stride target-arm: lpae: Replace tsz with computed inputsize target-arm: Add support for AArch32 S2 negative t0sz target-arm: lpae: Move declaration of t0sz and t1sz target-arm: lpae: Make t0sz and t1sz signed integers target-arm: Add HPFAR_EL2 i.MX: Standardize i.MX GPT debug i.MX: Standardize i.MX EPIT debug i.MX: Standardize i.MX FEC debug i.MX: Standardize i.MX CCM debug i.MX: Standardize i.MX AVIC debug i.MX: Standardize i.MX I2C debug ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add support for S1 + S2 MMU translationsEdgar E. Iglesias2015-10-272-7/+32
| | | | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-15-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Route S2 MMU faults to EL2Edgar E. Iglesias2015-10-271-2/+8
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-14-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add S2 translation to 32bit S1 PTWsEdgar E. Iglesias2015-10-271-5/+17
| | | | | | | | | | | | | | | | | | | | Add support for applying S2 translation to 32bit S1 page-table walks. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-13-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add S2 translation to 64bit S1 PTWsEdgar E. Iglesias2015-10-272-4/+50
| | | | | | | | | | | | | | | | | | | | Add support for applying S2 translation to 64bit S1 page-table walks. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-12-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add ARMMMUFaultInfoEdgar E. Iglesias2015-10-273-14/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | Introduce ARMMMUFaultInfo to propagate MMU Fault information across the MMU translation code path. This is in preparation for adding Stage-2 translation. No functional changes. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-11-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Avoid inline for get_phys_addrEdgar E. Iglesias2015-10-271-8/+8
| | | | | | | | | | | | | | | | | | Avoid inline for get_phys_addr() to prepare for future recursive use. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-10-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add support for S2 page-table protection bitsEdgar E. Iglesias2015-10-271-4/+37
| | | | | | | | | | | | | | Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-9-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add computation of starting level for S2 PTWEdgar E. Iglesias2015-10-272-13/+126
| | | | | | | | | | | | | | | | | | | | | | The starting level for S2 pagetable walks is computed differently from the S1 starting level. Implement the S2 variant. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-8-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: lpae: Rename granule_sz to strideEdgar E. Iglesias2015-10-271-15/+15
| | | | | | | | | | | | | | | | | | | | | | Rename granule_sz to stride to better match the reference manuals. No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: lpae: Replace tsz with computed inputsizeEdgar E. Iglesias2015-10-271-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove the tsz variable and introduce inputsize. This simplifies the code a little and makes it easier to compare with the reference manuals. No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-6-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add support for AArch32 S2 negative t0szEdgar E. Iglesias2015-10-271-1/+17
| | | | | | | | | | | | | | | | | | | | Add support for AArch32 S2 negative t0sz. In preparation for using 40bit IPAs on AArch32. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-5-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: lpae: Move declaration of t0sz and t1szEdgar E. Iglesias2015-10-271-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Move declaration of t0sz and t1sz to the top of the function avoiding a mix of code and variable declarations. No functional change. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-4-git-send-email-edgar.iglesias@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: lpae: Make t0sz and t1sz signed integersEdgar E. Iglesias2015-10-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Make t0sz and t1sz signed integers to match tsz and to make it easier to implement support for AArch32 negative t0sz. t1sz is changed for consistensy. No functional change. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-3-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add HPFAR_EL2Edgar E. Iglesias2015-10-272-0/+13
| | | | | | | | | | | | | | Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1445864527-14520-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX GPT debugJean-Christophe Dubois2015-10-271-33/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: b7ce7e98a051479453744aded122789531d80a44.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX EPIT debugJean-Christophe Dubois2015-10-271-28/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 5bbad71517ca728d8865f7b9f998baa0df022794.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX FEC debugJean-Christophe Dubois2015-10-271-32/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 57e565982db94fb433c32dfa17608888464d21de.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX CCM debugJean-Christophe Dubois2015-10-271-12/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message The qemu_log_mask() output is following the same format as the above debug. Adding some missing qemu_log_mask call for bad registers. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 293e08f31cbb4df84d58f693243e61e770c73b3a.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX AVIC debugJean-Christophe Dubois2015-10-271-26/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 29885ffea2577eaf2288c1d17fd87ee951748b49.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX I2C debugJean-Christophe Dubois2015-10-271-21/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 328acfe6fc09a5afdbfbfd5220e0869fd5082660.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX GPIO debugJean-Christophe Dubois2015-10-271-13/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message The qemu_log_mask() outputis following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 4f2007adcf0f579864bb4dd8a825824e0e9098b8.1445781957.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * i.MX: Standardize i.MX serial debug.Jean-Christophe Dubois2015-10-271-26/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The goal is to have debug code always compiled during build. We standardize all debug output on the following format: [QOM_TYPE_NAME]reporting_function: debug message We also replace IPRINTF with qemu_log_mask(). The qemu_log_mask() output is following the same format as the above debug. Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Message-id: 47b8759b251d356c633faf7ea34f897f340aea4e.1445781957.git.jcd@tribudubois.net [PMM: Drop attempt to print the ram_addr of a memory region in one DPRINTF, which (a) was using the wrong format string so didn't build on 32-bit and (b) was incorrectly looking at a private field of a MemoryRegion struct] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * hw/arm/virt: don't use a15memmap directlyAndrew Jones2015-10-271-4/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should always go through VirtBoardInfo when we need the memmap. To avoid using a15memmap directly, in this case, we need to defer the max-cpus check from class init time to instance init time. In class init we now use MAX_CPUMASK_BITS for max_cpus initialization, which is the maximum QEMU supports, and also, incidentally, the maximum KVM/gicv3 currently supports. Also, a nice side-effect of delaying the max-cpus check is that we now get more appropriate error messages for gicv2 machines that try to configure more than 123 cpus. Before this patch it would complain that the requested number of cpus was greater than 123, but for gicv2 configs, it should complain that the number is greater than 8. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 1445189728-860-3-git-send-email-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * arm_gic_kvm: Disable live migration if not supportedPavel Fedin2015-10-272-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently, if the kernel does not have live migration API, the migration will still be attempted, but vGIC save/restore functions will just not do anything. This will result in a broken machine state. This patch fixes the problem by adding migration blocker if kernel API is not supported. Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Add support for SPSR_(ABT|UND|IRQ|FIQ)Soren Brinkmann2015-10-271-0/+16
| | | | | | | | | | | | Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm/translate.c: Handle non-executable page-straddling Thumb insnsPeter Maydell2015-10-271-1/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the memory we're trying to translate code from is not executable we have to turn this into a guest fault. In order to report the correct PC for this fault, and to make sure it is not reported until after any other possible faults for instructions earlier in execution, we must terminate TBs at the end of a page, in case the next instruction is in a non-executable page. This is simple for T16, A32 and A64 instructions, which are always aligned to their size. However T32 instructions may be 32-bits but only 16-aligned, so they can straddle a page boundary. Correct the condition that checks whether the next instruction will touch the following page, to ensure that if we're 2 bytes before the boundary and this insn is T32 then we end the TB. Reported-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()Peter Maydell2015-10-271-30/+52
|/ | | | | | | | | | | | | | | | | The code in arm_excp_unmasked() suppresses the ability of PSTATE.AIF to mask exceptions from a lower EL targeting EL2 or EL3 if the CPU is 64-bit. This is correct for a target of EL3, but not correct for targeting EL2. Further, we go to some effort to calculate scr and hcr values which are not used at all for the 64-bit CPU case. Rearrange the code to correctly implement the 64-bit CPU logic and keep the hcr/scr calculations in the 32-bit CPU codepath. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1444327729-4120-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
* Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into ↵Peter Maydell2015-10-276-34/+232
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | staging # gpg: Signature made Tue 27 Oct 2015 05:47:28 GMT using RSA key ID 398D6211 # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D 6211 * remotes/jasowang/tags/net-pull-request: net: free the string returned by object_get_canonical_path_component net: make iov_to_buf take right size argument in nc_sendv_compat() net: Remove duplicate data from query-rx-filter on multiqueue net devices vmxnet3: Do not fill stats if device is inactive options: Add documentation for filter-dump net/dump: Provide the dumping facility as a net-filter net/dump: Separate the NetClientState from the DumpState net/dump: Rework net-dump init functions net/dump: Add support for receive_iov function net: cadence_gem: Set initial MAC address Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| * net: free the string returned by object_get_canonical_path_componentYang Hongyang2015-10-271-2/+3
| | | | | | | | | | | | | | | | | | | | The value returned from object_get_canonical_path_component must be freed. Signed-off-by: Yang Hongyang <yanghy@cn.fujitsu.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
| * net: make iov_to_buf take right size argument in nc_sendv_compat()Yang Hongyang2015-10-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | We want "buf, sizeof(buf)" here. sizeof(buffer) is the size of a pointer, which is wrong. Thanks to Paolo for pointing it out. Signed-off-by: Yang Hongyang <yanghy@cn.fujitsu.com> Cc: Jason Wang <jasowang@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
| * net: Remove duplicate data from query-rx-filter on multiqueue net devicesVladislav Yasevich2015-10-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When responding to a query-rx-filter command on a multiqueue netdev, qemu reports the data for each queue. The data, however, is not per-queue, but per device and the same data is reported multiple times. This causes confusion and may also cause extra unnecessary processing when looking at the data. Commit 638fb14169 (net: Make qmp_query_rx_filter() with name argument more obvious) partially addresses this issue, by limiting the output when the name is specified. However, when the name is not specified, the issue still persists. Signed-off-by: Vladislav Yasevich <vyasevic@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
| * vmxnet3: Do not fill stats if device is inactiveShmulik Ladkani2015-10-271-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Guest OS may issue VMXNET3_CMD_GET_STATS even before device was activated (for example in linux, after insmod but prior net-dev open). Accessing shared descriptors prior device activation is illegal as the VMXNET3State structures have not been fully initialized. As a result, guest memory gets corrupted and may lead to guest OS crashes. Fix, by not filling the stats descriptors if device is inactive. Reported-by: Leonid Shatz <leonid.shatz@ravellosystems.com> Acked-by: Dmitry Fleytman <dmitry@daynix.com> Signed-off-by: Dana Rubin <dana.rubin@ravellosystems.com> Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
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